STM32F103x8, STM32F103xB
Pinouts and pin description
Alternate functions(4)
Table 5.
Medium-density STM32F103xx pin definitions (continued)
Pins
Main
Pin name
function(3)
(after reset)
Default
Remap
A10 34 A8 46 72 25
F8 73
PA13
I/O FT JTMS/SWDIO
Not connected
PA13
-
-
-
-
E6 35 D5 47 74 26
F6 36 E5 48 75 27
A9 37 A7 49 76 28
VSS_2
VDD_2
PA14
S
S
VSS_2
VDD_2
I/O FT JTCK/SWCLK
PA14
TIM2_CH1_ETR/
PA15 /SPI1_NSS
A8 38 A6 50 77 29
PA15
I/O FT
JTDI
B9
B8
C8
D8
E8
B7
C7
D7
B6
C6
D6
-
-
B7 51 78
B6 52 79
C5 53 80
PC10
PC11
PC12
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
I/O FT
I/O FT
I/O FT
PC10
PC11
PC12
USART3_TX
USART3_RX
USART3_CK
CANRX
-
5
6
C1
D1
5
6
81
82
2
3
-
I/O FT OSC_IN(9)
I/O FT OSC_OUT(9)
CANTX
B5 54 83
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
PD2
PD3
PD4
PD5
PD6
PD7
TIM3_ETR
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
84
85
86
87
88
-
USART2_CTS
USART2_RTS
USART2_TX
USART2_RX
USART2_CK
-
-
-
-
TIM2_CH2 / PB3
TRACESWO
SPI1_SCK
A7 39 A5 55 89 30
A6 40 A4 56 90 31
PB3
PB4
I/O FT
I/O FT
JTDO
TIM3_CH1/ PB4/
SPI1_MISO
JNTRST
TIM3_CH2 /
SPI1_MOSI
C5 41 C4 57 91 32
B5 42 D3 58 92 33
PB5
PB6
I/O
PB5
PB6
I2C1_SMBAl
I2C1_SCL(8)
TIM4_CH1(8)
/
I/O FT
USART1_TX
USART1_RX
I2C1_SDA(8)
TIM4_CH2(8)
/
A5 43 C3 59 93 34
D5 44 B4 60 94 35
PB7
BOOT0
PB8
I/O FT
I
PB7
BOOT0
PB8
I2C1_SCL /
CANRX
B4 45 B3 61 95
A4 46 A3 62 96
-
-
I/O FT
TIM4_CH3(8)
TIM4_CH4(8)
I2C1_SDA/
CANTX
PB9
I/O FT
PB9
Doc ID 13587 Rev 11
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