Functional overview
Table 8.
STM32F302xx/STM32F303xx
Capacitive sensing GPIOs available on STM32F302xx/STM32F303xx
devices (continued)
Capacitive sensing
signal name
Pin
name
Capacitive sensing
signal name
Pin
name
Group
Group
TSC_G3_IO1
TSC_G3_IO2
TSC_G3_IO3
TSC_G3_IO4
TSC_G4_IO1
TSC_G4_IO2
TSC_G4_IO3
TSC_G4_IO4
PC5
PB0
PB1
PB2
PA9
TSC_G7_IO1
TSC_G7_IO2
TSC_G7_IO3
TSC_G7_IO4
TSC_G8_IO1
TSC_G8_IO2
TSC_G8_IO3
TSC_G8_IO4
PE2
PE3
3
7
PE4
PE5
PD12
PD13
PD14
PD15
PA10
PA13
PA14
4
8
Table 9.
No. of capacitive sensing channels available on
STM32F302xx/STM32F303xx devices
Number of capacitive sensing channels
STM32F30xVx STM32F30xRx STM32F30xCx
Analog I/O group
G1
G2
G3
G4
G5
G6
G7
G8
3
3
3
3
3
3
3
3
3
3
3
3
3
3
0
0
3
3
2
3
3
3
0
0
Number of capacitive
sensing channels
24
18
17
3.26
Development support
3.26.1
Serial wire JTAG debug port (SWJ-DP)
The ARM SWJ-DP Interface is embedded, and is a combined JTAG and serial wire debug
port that enables either a serial wire debug or a JTAG probe to be connected to the target.
The JTAG TMS and TCK pins are shared respectively with SWDIO and SWCLK and a
specific sequence on the TMS pin is used to switch between JTAG-DP and SW-DP.
3.26.2
Embedded trace macrocell™
The ARM embedded trace macrocell provides a greater visibility of the instruction and data
flow inside the CPU core by streaming compressed data at a very high rate from the
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Doc ID 023353 Rev 5