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STM32F302RC 参数 Datasheet PDF下载

STM32F302RC图片预览
型号: STM32F302RC
PDF下载: 下载PDF文件 查看货源
内容描述: ARM的Cortex- M4F 32B MCUFPU ,高达256 KB的SRAM Flash48KB [ARM Cortex-M4F 32b MCUFPU, up to 256KB Flash48KB SRAM]
分类和应用: 静态存储器
文件页数/大小: 133 页 / 2061 K
品牌: STMICROELECTRONICS [ ST ]
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Functional overview  
STM32F302xx/STM32F303xx  
In debug mode, the advanced-control timer counter can be frozen and the PWM outputs  
disabled to turn off any power switches driven by these outputs.  
Many features are shared with those of the general-purpose TIM timers (described in  
Section 3.16.2 using the same architecture, so the advanced-control timers can work  
together with the TIM timers via the Timer Link feature for synchronization or event chaining.  
3.16.2  
General-purpose timers (TIM2, TIM3, TIM4, TIM15, TIM16, TIM17)  
There are up to six synchronizable general-purpose timers embedded in the  
STM32F302xx/STM32F303xx (see Table 3 for differences). Each general-purpose timer  
can be used to generate PWM outputs, or act as a simple time base.  
TIM2, 3, and TIM4  
These are full-featured general-purpose timers:  
TIM2 has a 32-bit auto-reload up/downcounter and 32-bit prescaler  
TIM3 and 4 have 16-bit auto-reload up/downcounters and 16-bit prescalers.  
These timers all feature 4 independent channels for input capture/output compare,  
PWM or one-pulse mode output. They can work together, or with the other general-  
purpose timers via the Timer Link feature for synchronization or event chaining.  
The counters can be frozen in debug mode.  
All have independent DMA request generation and support quadrature encoders.  
TIM15, 16 and 17  
These three timers general-purpose timers with mid-range features:  
They have 16-bit auto-reload upcounters and 16-bit prescalers.  
TIM15 has 2 channels and 1 complementary channel  
TIM16 and TIM17 have 1 channel and 1 complementary channel  
All channels can be used for input capture/output compare, PWM or one-pulse mode  
output.  
The timers can work together via the Timer Link feature for synchronization or event  
chaining. The timers have independent DMA request generation.  
The counters can be frozen in debug mode.  
3.16.3  
3.16.4  
Basic timers (TIM6, TIM7)  
These timers are mainly used for DAC trigger generation. They can also be used as a  
generic 16-bit time base.  
Independent watchdog (IWDG)  
The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is  
clocked from an independent 40 kHz internal RC and as it operates independently from the  
main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog  
to reset the device when a problem occurs, or as a free running timer for application timeout  
management. It is hardware or software configurable through the option bytes. The counter  
can be frozen in debug mode.  
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Doc ID 023353 Rev 5  
 
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