STM32F103xC, STM32F103xD, STM32F103xE
Pinouts and pin descriptions
Table 6.
Pins
FSMC pin definition (continued)
FSMC
LQFP100
BGA100(1)
NOR/PSRAM/
CF
CF/IDE
NOR/PSRAM Mux NAND 16 bit
SRAM
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PG2
PG3
PG4
PG5
PG6
PG7
PD0
D14
D15
D14
D15
D14
D15
A16
A17
A18
D0
DA14
DA15
A16
D14
D15
CLE
ALE
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
A17
A18
D0
D1
D0
D1
DA0
DA1
D0
D1
D1
A12
A13
A14
A15
-
-
-
INT2
INT3
D2
-
-
D2
D3
D2
D3
D2
D3
DA2
DA3
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
PD1
D3
PD3
CLK
NOE
NWE
NWAIT
NE1
NE2
NE3
CLK
PD4
NOE
NWE
NOE
NWE
NOE
NWE
NWAIT
NE1
NOE
NWE
PD5
PD6
NWAIT
NWAIT
NWAIT
NCE2
NCE3
PD7
PG9
PG10
PG11
PG12
PG13
PG14
PB7
NE2
NCE4_1 NCE4_1
NCE4_2 NCE4_2
NE3
-
-
NE4
A24
NE4
A24
-
-
A25
A25
-
NADV
NBL0
NBL1
NADV
NBL0
NBL1
Yes
Yes
Yes
PE0
PE1
1. Ports F and G are not available in devices delivered in 100-pin packages.
Doc ID 14611 Rev 8
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