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STM32F103RCT6 参数 Datasheet PDF下载

STM32F103RCT6图片预览
型号: STM32F103RCT6
PDF下载: 下载PDF文件 查看货源
内容描述: 时钟,复位和电源管理 [Clock, reset and supply management]
分类和应用: 时钟
文件页数/大小: 130 页 / 1933 K
品牌: STMICROELECTRONICS [ ST ]
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Electrical characteristics  
STM32F103xC, STM32F103xD, STM32F103xE  
(1)(2)  
Table 39. Switching characteristics for PC Card/CF read and write cycles  
(continued)  
Max  
Symbol  
tw(NIOWR)  
tv(NIOWR-D)  
th(NIOWR-D)  
Parameter  
FSMC_NIOWR low width  
Min  
Unit  
8tHCLK + 3  
ns  
ns  
ns  
ns  
FSMC_NIOWR low to FSMC_D[15:0] valid  
FSMC_NIOWR high to FSMC_D[15:0] invalid  
5tHCLK +1  
11tHCLK  
td(NCE4_1-NIOWR) FSMC_NCE4_1 low to FSMC_NIOWR valid  
5tHCLK+3ns  
th(NCEx-NIOWR) FSMC_NCEx high to FSMC_NIOWR invalid  
5tHCLK – 5  
ns  
th(NCE4_1-NIOWR) FSMC_NCE4_1 high to FSMC_NIOWR invalid  
td(NIORD-NCEx) FSMC_NCEx low to FSMC_NIORD valid FSMC_NCE4_1  
5tHCLK + 2.5 ns  
ns  
td(NIORD-NCE4_1) low to FSMC_NIORD valid  
th(NCEx-NIORD)  
FSMC_NCEx high to FSMC_NIORD invalid  
5tHCLK – 5  
th(NCE4_1-NIORD) FSMC_NCE4_1 high to FSMC_NIORD invalid  
tsu(D-NIORD)  
td(NIORD-D)  
tw(NIORD)  
FSMC_D[15:0] valid before FSMC_NIORD high  
FSMC_D[15:0] valid after FSMC_NIORD high  
FSMC_NIORD low width  
4.5  
ns  
ns  
ns  
9
8tHCLK + 2  
1. CL = 15 pF.  
2. Based on characterization, not tested in production.  
NAND controller waveforms and timings  
Figure 38 through Figure 41 represent synchronous waveforms and Table 40 provides the  
corresponding timings. The results shown in this table are obtained with the following FSMC  
configuration:  
COM.FSMC_SetupTime = 0x01;  
COM.FSMC_WaitSetupTime = 0x03;  
COM.FSMC_HoldSetupTime = 0x02;  
COM.FSMC_HiZSetupTime = 0x01;  
ATT.FSMC_SetupTime = 0x01;  
ATT.FSMC_WaitSetupTime = 0x03;  
ATT.FSMC_HoldSetupTime = 0x02;  
ATT.FSMC_HiZSetupTime = 0x01;  
Bank = FSMC_Bank_NAND;  
MemoryDataWidth = FSMC_MemoryDataWidth_16b;  
ECC = FSMC_ECC_Enable;  
ECCPageSize = FSMC_ECCPageSize_512Bytes;  
TCLRSetupTime = 0;  
TARSetupTime = 0;  
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Doc ID 14611 Rev 8