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STM32F103RC 参数 Datasheet PDF下载

STM32F103RC图片预览
型号: STM32F103RC
PDF下载: 下载PDF文件 查看货源
内容描述: 基于ARM的高性能线的32位MCU,具有高达512 KB的闪存, USB , CAN ,11个定时器,3个ADC和13通信接口 [Performance line, ARM-based 32-bit MCU with up to 512 KB Flash, USB, CAN, 11 timers, 3 ADCs and 13 communication interfaces]
分类和应用: 闪存通信
文件页数/大小: 118 页 / 1231 K
品牌: STMICROELECTRONICS [ ST ]
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STM32F103xC, STM32F103xD, STM32F103xE  
Controller area network (CAN)  
Description  
The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It  
can receive and transmit standard frames with 11-bit identifiers as well as extended frames  
with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and  
14 scalable filter banks.  
Universal serial bus (USB)  
The STM32F103xC, STM32F103xD and STM32F103xE performance line embed a USB  
device peripheral compatible with the USB full-speed 12 Mbs. The USB interface  
implements a full-speed (12 Mbit/s) function interface. It has software-configurable endpoint  
setting and suspend/resume support. The dedicated 48 MHz clock is generated from the  
internal main PLL (the clock source must use a HSE crystal oscillator).  
GPIOs (general-purpose inputs/outputs)  
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as  
input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the  
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current-  
capable except for analog inputs.  
The I/Os alternate function configuration can be locked if needed following a specific  
sequence in order to avoid spurious writing to the I/Os registers.  
I/Os on APB2 with up to 18 MHz toggling speed  
ADC (analog to digital converter)  
Three 12-bit analog-to-digital converters are embedded into STM32F103xC, STM32F103xD  
and STM32F103xE performance line devices and each ADC shares up to 21 external  
channels, performing conversions in single-shot or scan modes. In scan mode, automatic  
conversion is performed on a selected group of analog inputs.  
Additional logic functions embedded in the ADC interface allow:  
Simultaneous sample and hold  
Interleaved sample and hold  
Single shunt  
The ADC can be served by the DMA controller.  
An analog watchdog feature allows very precise monitoring of the converted voltage of one,  
some or all selected channels. An interrupt is generated when the converted voltage is  
outside the programmed thresholds.  
The events generated by the standard timers (TIMx) and the advanced-control timers (TIM1  
and TIM8) can be internally connected to the ADC start trigger and injection trigger,  
respectively, to allow the application to synchronize A/D conversion and timers.  
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