Pin descriptions
STM32F103xx
Table 3.
Pins
Pin definitions (continued)
Main function(3)
(after reset)
Pin name
Default alternate functions
PB15/SPI2_MOSI
TIM1_CH3N
SPI2_MOSI(5)
/
G8 28 36 54
I/O
FT
PB15
TIM1_CH3N(6)
K9
J9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
55
56
57
58
59
60
61
62
PD8
PD9
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
PD8
PD9
H9
PD10
PD11
PD12
PD13
PD14
PD15
PC6
PD10
PD11
PD12
PD13
PD14
PD15
PC6
G9
K10
J10
H10
G10
F10
E10
F9
37 63
38 64
39 65
40 66
PC7
PC7
PC8
PC8
E9
-
PC9
PC9
PA8/USART1_CK/
TIM1_CH1/MCO
USART1_CK/
D9 29 41 67
C9 30 42 68
D10 31 43 69
I/O
I/O
I/O
FT
FT
FT
PA8
PA9
TIM1_CH1(6)/MCO
PA9/USART1_TX/
TIM1_CH2
USART1_TX(6)
TIM1_CH2(6)
/
PA10/USART1_RX/
TIM1_CH3
USART1_RX(6)
TIM1_CH3(6)
/
PA10
PA11 / USART1_CTS/
CANRX / USBDM/
TIM1_CH4
USART1_CTS/
C10 32 44 70
I/O
FT
PA11
CANRX(6)
/
TIM1_CH4(6) / USBDM
PA12 / USART1_RTS/
CANTX / USBDP/
TIM1_ETR
USART1_RTS/
B10 33 45 71
A10 34 46 72
I/O
I/O
FT
FT
PA12
CANTX(6)
/
TIM1_ETR(6) / USBDP
PA13/JTMS/SWDIO
JTMS/SWDIO
PA13
F8
-
-
73
Not connected
VSS_2
VDD_2
E6 35 47 74
F6 36 48 75
A9 37 49 76
A8 38 50 77
VSS_2
VDD_2
S
S
PA14/JTCK/SWCLK
PA15/JTDI
PC10
I/O
I/O
I/O
I/O
I/O
FT
FT
FT
FT
FT
JTCK/SWCLK
JTDI
PA14
PA15
B9
B8
C8
-
-
-
51 78
52 79
53 80
PC10
PC11
PC11
PC12
PC12
20/67