STLC3055
Layout Recommendation
A properly designed PCB layout is a basic issue
to guarantee a correct behaviour and good noise
performances.
Particular care must be taken on the ground con-
nection and in this case the star configuration al-
lows surely to avoid possible problems (see Appli-
cation Diagram Fig. 7).
The ground of the power supply (VPOS) has to
be connected to the center of the star, let’s call
this point PGND. This point should show a resis-
tance as low as possible, that means it should be
a ground plane.
Noise sources can be identified in not enough
good grounds, not enough low impedance sup-
plies and parasitic coupling between PCB tracks
and high impedance pins of the device.
In particular to avoid noise problems the layout
should prevent any coupling between the DC/DC
converter components and analog pins that are
referred to AGND (ex: RD, IREF, RTH, RLIM,
VF). As a first reccomendation the components
CV, L, D1, CVPOS, RSENSE should be kept as
close as possible to each other and isolated from
the other components.
Additional improvements can be obtained:
decoupling the center of the star from the ana-
log ground of STLC3055 using small chokes.
adding a capacitor in the range of 100nF be-
tween VPOS and AGND in order to filter the
switch frequency on VPOS.
External Components List
In order to properly define the external compo-
nents value the following system parameters
have to be defined:
The AC input impedance shown by the SLIC at
the line terminals ”Zs” to which the return loss
measurement is referred. It can be real (typ.
600Ω) or complex.
The AC balance impedance, it is the equiva-
lent impedance of the line ”Zl” used for evalu-
ation of the trans-hybrid loss performances
(2/4 wire conversion). It is usually a complex
impedance.
The value of the two protection resistors Rp in
series with the line termination.
The line impedance at the TTX frequency
”Zlttx”.
The metering pulse level amplitude measured
at line termination ”V
LOTTX
”. In case of low or-
der filtering, V
LOTTX
represents the amplitude
(Vrms) of the fundamental frequency compo-
nent. (typ 12 or 16KHz).
Pulse metering envelope rise and decay time
constant ”
τ
”.
The slope of the ringing waveform ”
∆
V
TR
/
∆
T
”.
The value of the constant current limit current
”Ilim”.
The value of the off-hook current threshold
”I
TH
”.
The value of the ring trip rectified average
threshold current ”I
RTH
”.
The value of the required self generated nega-
tive battery ”V
BATR
” in ring mode (max value
is 70V). This value can be obtained from the
desired ring peak level + 5V.
The value of the maximum current peak sunk
from Vpos ”IPK”.
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