ST92F124/F150/F250 - GENERAL DESCRIPTION
Pin No.
Port
Name
Alternate Functions
Analog Data Input 0
TQFP64 PQFP100 TQFP100
AIN0
I
I
P8.0
P8.1
-
-
74
75
71
72
WKUP14
AIN1
Wake-up Line 14
I
Analog Data Input 1
Wake-up Line 15
WKUP15
AIN2
I
P8.2
P8.3
P8.4
P8.5
P8.6
P8.7
P9.0
P9.1
P9.2
-
-
-
-
-
-
-
-
-
76
77
78
79
80
81
98
99
100
73
74
75
76
77
78
95
96
97
I
Analog Data Input 2
Analog Data Input 3
Analog Data Input 4
Analog Data Input 5
Analog Data Input 6
Analog Data Input 7
SCI-A Receive Data Input
SCI-A Transmit Data Output
Address bit 16
AIN3
I
AIN4
I
AIN5
I
AIN6
I
AIN7
I
2)
RDI
I
2)
TDO
O
O
O
A16
3)
A17
Address bit 17
P9.3
P9.4
-
-
1
2
98
99
2)
SDA1
I/O I²C 1 Data
3)
A18
O
Address bit 18
2)
SCL1
I/O I²C 1 Clock
P9.5
P9.6
P9.7
-
-
-
3
4
5
100
1
A19
A20
A21
O
O
O
Address bit 19
Address bit 20
Address bit 21
2
Note1: The ST92F150-EMU2 emulator does not
emulate ADC channels from AIN0 to AIN7 and ex-
tended function timers because they are not imple-
mented on the emulator chip. See also Section
13.2 on page 418.
Note 2: Available on some devices only.
Note 3: For the ST92F250 device, since A[18:17]
share the same pins as SDA1 and SCL1 of I²C_1,
these address bits are not available when the
I²C_1 is in use (when I2CCR.PE bit is set).
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STMICROELECTRONICS [ ST ]
