ST7538
Figure 20. Power Good Function
V
DC
4.5V
250mV
Time
Time
PG
PG OK
D03IN1411
Power-Up Procedure
To ensure ST7538 proper power-Up sequence, PAVcc, AVss and DVss Supply has to fulfil the following
rules:
PAVcc rising slope must not exceed 10V/ms.
When DVdd and AVdd are below 5V: 100mV < PAVcc-AVdd , PAVcc-DVdd < 1.2V.
When AVdd and DVdd supply are connected to VDC the above mentioned relation is guarantied if VDC
load < 100mA and if the filtering capacitor on VDC < 100uF.
Figure 21. Power-UP Sequence
Voltage
PAVcc
DVdd, AVdd
5V
PAVcc-AVdd
PAVcc-DVdd
D03IN1424
Time
PACKAGE INFORMATION
Best thermal performance is acheived when slug is soldered to PCB.
It is recomended to have five solder dots (See fig. 22) without resist to connect the Copper slug to the
ground layer on the soldering side. Moreover it is recomeded to connect the ground layer on the soldering
side to another ground layer on the opposite side with 15 to 20 vias.
It is suggested to not use the PCB surface below the slug area to interconnect any pin except groung pins.
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STMICROELECTRONICS [ ST ]
