ST7538
Table 5. Vout vs. R1 & R2 resistors value
Vout (Vrms)
0.150
Vout (dBµV)
103.5
(R1+R2)/R2
1.1
R2 (KΩ)
7.5
R1 (KΩ)
1.0
3.9
0.250
108.0
1.9
5.1
0.350
110.9
2.7
3.6
5.6
0.500
114.0
3.7
3.3
8.2
0.625
115.9
4.7
3.3
11.0
12.0
11.0
10.0
13.0
15.0
0.750
117.5
5.8
2.7
0.875
118.8
6.6
2.0
1.000
120.0
7.6
1.6
1.250
121.9
9.5
1.6
1.500
123.5
10.8
1.6
Notes: The rate of R2 takes in account the input resistance on the SENSE pin (36 KΩ).
5.6nF capacitor effect has been neglected.
Figure 14. Typical Output Current vs. Rcl
Irms
(mA)
D01IN1311
325
300
275
250
225
200
175
150
125
100
2
2.5
3
3.5
4
4.5
5
Rcl(KΩ)
■ Integrated Power Line Interface (PLI)
The Power Line Interface (PLI) is a double CMOS AB Class Power Amplifier with the two outputs
(ATOP1 and ATOP2) in opposition of phase.
Two are the possible configuration:
- Single Ended Output (ATOP1).
- Bridge Connection
The Bridge connection guarantee a Differential Output Voltage to the load with twice the swing of each
individual Output. This topology virtually eliminates the even harmonics generation.
The PLI requires, to ensure a proper operation, a regulated and well filtered Supply Voltage. PAVcc
Voltage must fulfil the following formula to work without clipping phenomena:
VATOP(AC)
PAVcc ≥ ----------------------------------- + 7.5V
2
To allow the driving of an external Power Line Interface, the output of the ALC is available even on ATO
pin. ATO output has a current capability much lower than ATOP1 and ATOP2.
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