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ST25C16M3TR 参数 Datasheet PDF下载

ST25C16M3TR图片预览
型号: ST25C16M3TR
PDF下载: 下载PDF文件 查看货源
内容描述: 16千位串行I2C总线的EEPROM与用户定义的块写保护 [16 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection]
分类和应用: 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 17 页 / 129 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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ST24/25C16, ST24/25W16
Figure 2A. DIP Pin Connections
Figure 2B. SO8 Pin Connections
ST24x16
ST25x16
PRE
PB0
PB1
VSS
1
2
3
4
8
7
6
5
AI00867B
ST24x16
ST25x16
VCC
MODE/WC
SCL
SDA
PRE
PB0
PB1
VSS
1
2
3
4
8
7
6
5
AI00500B
VCC
MODE/WC
SCL
SDA
Table 2. Absolute Maximum Ratings
(1)
Symbol
T
A
T
STG
T
LEAD
V
IO
V
CC
V
ESD
Parameter
Ambient Operating Temperature
Storage Temperature
Lead Temperature, Soldering
Input or Output Voltages
Supply Voltage
Electrostatic Discharge Voltage (Human Body model)
(2)
Electrostatic Discharge Voltage (Machine model)
(3)
(SO8)
(PSDIP8)
40 sec
10 sec
Value
–40 to 125
–65 to 150
215
260
–0.6 to 6.5
–0.3 to 6.5
4000
500
Unit
°C
°C
°C
V
V
V
V
Notes:
1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and
other relevant quality documents.
2. 100pF through 1500Ω; MIL-STD-883C, 3015.7
3. 200pF through 0Ω; EIAJ IC-121 (condition C)
DESCRIPTION
(cont’d)
ance of one million erase/write cycles with a data
retention of 40 years. The ST25x16 operates with
a power supply value as low as 2.5V. Both Plastic
Dual-in-Line and Plastic Small Outline packages
are available.
The memories are compatible with the I
2
C stand-
ard, two wire serial interface which uses a bi-direc-
tional data bus and serial clock. The memories
carry a built-in 4 bit, unique device identification
code (1010) corresponding to the I
2
C bus defini-
tion. The memories behave as slave devices in the
I
2
C protocol with all memory operations synchro-
nized by the serial clock. Read and write operations
are initiated by a START condition generated by the
bus master. The START condition is followed by a
stream of 4 bits (identification code 1010), 3 block
select bits, plus one read/write bit and terminated
by an acknowledge bit. When writing data to the
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