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ST25C16B5TR 参数 Datasheet PDF下载

ST25C16B5TR图片预览
型号: ST25C16B5TR
PDF下载: 下载PDF文件 查看货源
内容描述: 16千位串行I2C总线的EEPROM与用户定义的块写保护 [16 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 17 页 / 129 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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ST24/25C16, ST24/25W16
SIGNALS DESCRIPTION
Serial Clock (SCL).
The SCL input signal is used
to synchronise all data in and out of the memory. A
resistor can be connected from the SCL line to V
CC
to act as a pull up (see Figure 3).
Serial Data (SDA).
The SDA signal is bi-directional
and is used to transfer data in or out of the memory.
It is an open drain output that may be wire-OR’ed
with other open drain or open collector signals on
the bus. A resistor must be connected from the SDA
bus line to V
CC
to act as pull up (see Figure 3).
Protected Block Select (PB0, PB1).
PB0 and PB1
input signals select the block in the upper part of
the memory where write protection starts. These
inputs have a CMOS compatible input level.
Protect Enable (PRE).
The PRE input signal, in
addition to the status of the Block Address Pointer
bit (b2, location 7FFh as in Figure 7), sets the PRE
write protection active.
Mode (MODE).
The MODE input is available on pin
7 (see also WC feature) and may be driven dynami-
cally. It must be at V
IL
or V
IH
for the Byte Write
mode, V
IH
for Multibyte Write mode or V
IL
for Page
Write mode. When unconnected, the MODE input
is internally read as V
IH
(Multibyte Write mode).
Write Control (WC).
An hardware Write Control
feature is offered only for ST24W16 and ST25W16
versions on pin 7. This feature is usefull to protect
the contents of the memory from any erroneous
erase/write cycle. The Write Control signal is used
to enable (WC at V
IH
) or disable (WC at V
IL
) the
internal write protection. When unconnected, the
WC input is internally read as V
IL
. The devices with
this Write Control feature no longer supports the
Multibyte Write mode of operation, however all
other write modes are fully supported.
Refer to the AN404 Application Note for more de-
tailed information about Write Control feature.
Figure 3. Maximum R
L
Value versus Bus Capacitance (C
BUS
) for an I
2
C Bus
20
VCC
16
RL
RL
RL max (kΩ)
12
MASTER
8
SDA
SCL
CBUS
CBUS
4
VCC = 5V
0
100
200
CBUS (pF)
300
400
AI01100
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