Register set
ST10F276E
Table 68. Special function registers ordered by address (continued)
8-bit
addres
s
Physical
address
Reset
value
Name
Description
P4
b
FFC8h
E4h
E5h
E6h
E7h
E8h
E9h
EAh
EBh
EDh
EEh
EFh
Port 4 register (8-bit)
- - 00h
- - 00h
- - 00h
- - 00h
- - 00h
- - 00h
- - 00h
- - 00h
0000h
0000h
0200h
DP4 b
P6
DP6 b
P7
DP7 b
P8
FFCAh
FFCCh
FFCEh
FFD0h
FFD2h
FFD4h
FFD6h
FFDAh
FFDCh
FFDEh
Port 4 direction control register
Port 6 register (8-bit)
b
Port 6 direction control register
Port 7 register (8-bit)
b
Port 7 direction control register
Port 8 register (8-bit)
b
DP8 b
MRW b
MCW b
MSW b
Port 8 direction control register
MAC unit repeat word
MAC unit control word
MAC unit status word
22.6
X-registers sorted by name
Table 69 lists by order of their names all X-Bus registers which are implemented in the
ST10F276E. Although also physically mapped on X-Bus memory space, the Flash control
registers are listed in a separate section.
Note:
The X-registers are not bit-addressable.
Table 69. X-Registers ordered by name
Physical
Name
Description
Reset value
0000h
address
CAN1BRPER
CAN1BTR
EF0Ch
CAN1: BRP extension register
CAN1: Bit timing register
CAN1: CAN control register
CAN1: Error counter
EF06h
EF00h
EF04h
EF18h
EF1Ah
EF12h
EF10h
EF1Eh
EF20h
EF22h
EF24h
EF14h
2301h
0001h
0000h
0000h
0000h
0000h
0001h
0000h
0000h
0000h
0000h
FFFFh
CAN1CR
CAN1EC
CAN1IF1A1
CAN1IF1A2
CAN1IF1CM
CAN1IF1CR
CAN1IF1DA1
CAN1IF1DA2
CAN1IF1DB1
CAN1IF1DB2
CAN1IF1M1
CAN1: IF1 arbitration 1
CAN1: IF1 arbitration 2
CAN1: IF1 command mask
CAN1: IF1 command request
CAN1: IF1 data A 1
CAN1: IF1 data A 2
CAN1: IF1 data B 1
CAN1: IF1 data B 2
CAN1: IF1 mask 1
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Doc ID 12303 Rev 3
STMICROELECTRONICS [ ST ]
