欢迎访问ic37.com |
会员登录 免费注册
发布采购

M95640-WMN6TP/K 参数 Datasheet PDF下载

M95640-WMN6TP/K图片预览
型号: M95640-WMN6TP/K
PDF下载: 下载PDF文件 查看货源
内容描述: [8KX8 SPI BUS SERIAL EEPROM, PDSO8, 0.150 INCH, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, SOP-8]
分类和应用: 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 44 页 / 355 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号M95640-WMN6TP/K的Datasheet PDF文件第12页浏览型号M95640-WMN6TP/K的Datasheet PDF文件第13页浏览型号M95640-WMN6TP/K的Datasheet PDF文件第14页浏览型号M95640-WMN6TP/K的Datasheet PDF文件第15页浏览型号M95640-WMN6TP/K的Datasheet PDF文件第17页浏览型号M95640-WMN6TP/K的Datasheet PDF文件第18页浏览型号M95640-WMN6TP/K的Datasheet PDF文件第19页浏览型号M95640-WMN6TP/K的Datasheet PDF文件第20页  
Instructions  
M95320, M95640, M95320-x, M95640-x  
6.2  
Write Disable (WRDI)  
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction  
to the device.  
As shown in Figure 8, to send this instruction to the device, Chip Select (S) is driven Low,  
and the bits of the instruction byte are shifted in, on Serial Data Input (D).  
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select  
(S) being driven High.  
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:  
Power-up  
WRDI instruction execution  
WRSR instruction completion  
WRITE instruction completion.  
Figure 8.  
Write Disable (WRDI) sequence  
S
0
1
2
3
4
5
6
7
C
D
Q
Instruction  
High Impedance  
AI03750D  
16/44