M95320, M95640, M95320-x, M95640-x
Operating features
4
Operating features
4.1
Supply voltage (VCC)
4.1.1
Operating supply voltage V
CC
Prior to selecting the memory and issuing instructions to it, a valid and stable V voltage
CC
within the specified [V (min), V (max)] range must be applied (see Table 8.). In order to
CC
CC
secure a stable DC supply voltage, it is recommended to decouple the V line with a
CC
suitable capacitor (usually of the order of 10nF to 100nF) close to the V /V package
CC SS
pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t ).
W
4.1.2
Power-up conditions
When the power supply is turned on, V rises from V to V . During this time, the Chip
CC
SS
CC
Select (S) is not allowed to float but must follow the V voltage, therefore the S line should
CC
be connected to V via a suitable pull-up resistor.
CC
In addition, the Chip Select (S) input offers a built-in safety feature, as the S input is edge
sensitive as well as level sensitive: after Power-up, the device does not become selected
until a falling edge has first been detected on Chip Select (S). This ensures that Chip Select
(S) must have been High, prior to going Low to start the first operation.
The V rise time must not be faster than 1V/µs.
CC
4.1.3
Internal device Reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of V ), the device will not respond to any
CC
instruction until V has reached the Power On Reset threshold voltage (this threshold is
CC
lower than the minimum V operating voltage defined in Tables XX).
CC
When V has passed the POR threshold, the device is reset and in the following state:
CC
■
■
Standby Power mode
deselected (at next Power-up, a falling edge is required on Chip Select (S) before any
instructions can be started).
■
not in the Hold Condition
Status Register state:
■
■
the Write Enable Latch (WEL) is reset to 0
Write In Progress (WIP) is reset to 0. The SRWD, BP1 and BP0 bits of the Status
Register are in the same state as when the power was last removed (they are non-
volatile bits).
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STMICROELECTRONICS [ ST ]
