欢迎访问ic37.com |
会员登录 免费注册
发布采购

M27C4002-10F1 参数 Datasheet PDF下载

M27C4002-10F1图片预览
型号: M27C4002-10F1
PDF下载: 下载PDF文件 查看货源
内容描述: [256KX16 UVPROM, 100ns, CDIP40, LEAD FREE, CERAMIC, WINDOWED, FRIT SEALED, DIP-40]
分类和应用: 可编程只读存储器电动程控只读存储器内存集成电路
文件页数/大小: 24 页 / 204 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号M27C4002-10F1的Datasheet PDF文件第4页浏览型号M27C4002-10F1的Datasheet PDF文件第5页浏览型号M27C4002-10F1的Datasheet PDF文件第6页浏览型号M27C4002-10F1的Datasheet PDF文件第7页浏览型号M27C4002-10F1的Datasheet PDF文件第9页浏览型号M27C4002-10F1的Datasheet PDF文件第10页浏览型号M27C4002-10F1的Datasheet PDF文件第11页浏览型号M27C4002-10F1的Datasheet PDF文件第12页  
Device operation  
M27C4002  
2
Device operation  
The operating modes of the M27C4002 are listed in the Operating Modes table. A single  
power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V  
on A9 for Electronic Signature.  
2.1  
Read mode  
The M27C4002 has two control functions, both of which must be logically active in order to  
obtain data at the outputs. Chip Enable (E) is the power control and should be used for  
device selection. Output Enable (G) is the output control and should be used to gate data to  
the output pins, independent of device selection. Assuming that the addresses are stable,  
the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is  
available at the output after a delay of tGLQV from the falling edge of G, assuming that E has  
been low and the addresses have been stable for at least tAVQV-tGLQV  
.
2.2  
2.3  
Standby mode  
The M27C4002 has a standby mode which reduces the supply current from 50mA to 100µA.  
The M27C4002 is placed in the standby mode by applying a CMOS high signal to the E  
input. When in the standby mode, the outputs are in a high impedance state, independent of  
the G input.  
Two line output control  
Because EPROMs are usually used in larger memory arrays, the product features a 2 line  
control function which accommodates the use of multiple memory connection. The two line  
control function ows:  
Thlowest possible memory power dissipation  
Complete assurance that output bus contention will not occur.  
For the most efficient use of these two control lines, E should be decoded and used as the  
primary device selecting function, while G should be made a common connection to all  
devices in the array and connected to the READ line from the system control bus. This  
ensures that all deselected memory devices are in their low power standby mode and that  
the output pins are only active when data is required from a particular memory device.  
8/24