M27C160
Figure 10. Programming and Verify Modes AC Waveforms
A0-A19
Q0-Q15
VALID
tAVEL
DATA IN
tQVEL
DATA OUT
tEHQX
BYTEV
PP
tVPHAV
tVCHAV
tGLQV
tGHQZ
tGHAX
V
E
CC
tELEH
tQXGL
G
PROGRAM
VERIFY
AI00744
Figure 11. Programming Flowchart
PRESTO III Programming Algorithm
The PRESTO III Programming Algorithm allows
the whole array to be programed with a guaran-
teed margin in a typical time of 52.5 seconds. Pro-
gramming with PRESTO III consists of applying a
sequence of 50µs program pulses to each word
until a correct verify occurs (see Figure 11). During
programing and verify operation a MARGIN
MODE circuit is automatically activated to guaran-
tee that each cell is programed with enough mar-
gin. No overprogram pulse is applied since the
verify in MARGIN MODE provides the necessary
margin to each programmed cell.
V
= 6.25V, V
= 12.5V
PP
CC
n = 0
E = 50µs Pulse
NO
NO
++n
= 25
Program Inhibit
VERIFY
YES
++ Addr
Programming of multiple M27C160s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C160 may be common. A TTL low level pulse
YES
Last
Addr
NO
FAIL
applied to a M27C160's E input and V at 12.5V,
PP
will program that M27C160. A high level E input in-
hibits the other M27C160s from being pro-
grammed.
YES
CHECK ALL WORDS
Program Verify
BYTEV
1st: V
=V
IH
PP
CC
= 6V
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with E
2nd: V
= 4.2V
CC
AI01044B
at V and G at V , V
at 12.5V and V
at
IH
IL
PP
CC
6.25V.
10/19
STMICROELECTRONICS [ ST ]
