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M24C08-WMN6TP 参数 Datasheet PDF下载

M24C08-WMN6TP图片预览
型号: M24C08-WMN6TP
PDF下载: 下载PDF文件 查看货源
内容描述: 16Kbit的, 8Kbit , 4k位, 2Kbit和1K位,串行I²C总线EEPROM [16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit Serial I2C Bus EEPROM]
分类和应用: 存储内存集成电路光电二极管PC可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 29 页 / 484 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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M24C16, M24C08, M24C04, M24C02, M24C01
Table 15. AC Characteristics (M24Cxx, Device Grade 6)
Test conditions specified in
and
Symbol
f
C
t
CHCL
t
CLCH
t
DL1DL2 2
t
DXCX
t
CLDX
t
CLQX
t
CLQV 3
t
CHDX 1
t
DLCL
t
CHDH
t
DHDL
t
W
Note: 1.
2.
3.
4.
Alt.
f
SCL
t
HIGH
t
LOW
t
F
t
SU:DAT
t
HD:DAT
t
DH
t
AA
t
SU:STA
t
HD:STA
t
SU:STO
t
BUF
t
WR
Clock Frequency
Parameter
Min.
4
Max.
4
400
Unit
kHz
ns
ns
Clock Pulse Width High
Clock Pulse Width Low
SDA Fall Time
Data In Set Up Time
Data In Hold Time
Data Out Hold Time
Clock Low to Next Data Valid (Access Time)
Start Condition Set Up Time
Start Condition Hold Time
Stop Condition Set Up Time
Time between Stop Condition and Next Start Condition
Write Time
600
1300
20
100
0
200
200
600
600
600
1300
5
900
300
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
For a reSTART condition, or following a Write cycle.
Sampled only, not 100% tested.
To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
This is preliminary data for M24Cxx-Wxx3.
Table 16. AC Characteristics (M24Cxx, Device Grade 3; M24Cxx-W, Device Grade 6 or 3)
Test conditions specified in
and
or
Symbol
f
C
t
CHCL
t
CLCH
t
DL1DL2 2
t
DXCX
t
CLDX
t
CLQX
t
CLQV 3
t
CHDX 1
t
DLCL
t
CHDH
t
DHDL
t
W
Note: 1.
2.
3.
4.
Alt.
f
SCL
t
HIGH
t
LOW
t
F
t
SU:DAT
t
HD:DAT
t
DH
t
AA
t
SU:STA
t
HD:STA
t
SU:STO
t
BUF
t
WR
Clock Frequency
Parameter
Min.
Max.
400
Unit
kHz
ns
ns
Clock Pulse Width High
Clock Pulse Width Low
SDA Fall Time
Data In Set Up Time
Data In Hold Time
Data Out Hold Time
Clock Low to Next Data Valid (Access Time)
Start Condition Set Up Time
Start Condition Hold Time
Stop Condition Set Up Time
Time between Stop Condition and Next Start Condition
Write Time
600
1300
20
100
0
200
200
600
600
600
1300
10 or
4
5
900
300
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
For a reSTART condition, or following a Write cycle.
Sampled only, not 100% tested.
To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
10ms write time is offered on the standard device. 5ms write time is offered on new products bearing the Process Identification letter
“W” or “G” on the package, as described in
18/29