L6599A
Description
1
Description
The L6599A is an improved revision of the previous L6599. It is a double-ended controller
specific to series-resonant half bridge topology. It provides 50% complementary duty cycle:
the high-side switch and the low-side switch are driven ON/OFF 180° out-of-phase for
exactly the same time. Output voltage regulation is obtained by modulating the operating
frequency. A fixed deadtime inserted between the turn-off of one switch and the turn-on of
the other guarantees soft-switching and enables high-frequency operation.
To drive the high-side switch with the bootstrap approach, the IC incorporates a high-voltage
floating structure able to withstand more than 600 V with a synchronous-driven high-voltage
DMOS that replaces the external fast-recovery bootstrap diode.
The IC enables the designer to set the operating frequency range of the converter by means
of an externally programmable oscillator.
At startup, to prevent uncontrolled inrush current, the switching frequency starts from a
programmable maximum value and progressively decays until it reaches the steady-state
value determined by the control loop. This frequency shift is non-linear to minimize output
voltage overshoots; its duration is programmable as well.
At light load the IC may enter a controlled burst mode operation that keeps the converter
input consumption to a minimum.
IC functions include a not-latched active-low disable input with current hysteresis useful for
power sequencing or for brownout protection, a current sense input for OCP with frequency
shift and delayed shutdown with automatic restart. A higher level OCP latches off the IC if
the first-level protection is not sufficient to control the primary current. Their combination
offers complete protection against overload and short-circuits. An additional latched disable
input (DIS) allows easy implementation of OTP and/or OVP.
An interface with the PFC controller is provided that enables the pre-regulator to be
switched off during fault conditions, such as OCP shutdown and DIS high, or during burst
mode operation.
Doc ID 15308 Rev 7
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