Table 3.
Pin #
Block diagram
Pin functions (continued)
Name
Description
A parallel RC network connected to this pin sets the off time
of the higher power transistors. The pulse generator is a
monostable triggered by the output of the comparators (t
off
=
1.1 R
T
C
T
)
12, 14
RC
13
24
V
SS
- Logic supply Supply voltage input for logic circuitry
V
S
- Load supply
Supply voltage input for the output stages
Note:
ESD on GND, VS, VSS, OUT 1 A and OUT 2 A is guaranteed up to 1.5 kV (human body
model, 1500 W, 100 pF).
Figure 3.
Timing diagram
AM15160v1
Table 4.
Parameter
R
thj-case
R
thj-amb
Thermal data
Description
Thermal resistance junction-case max.
Thermal resistance junction-ambient max.
PDIP
18
75
(1)
Unit
°C/W
°C/W
1. With minimized copper area.
Doc ID 4970 Rev 4
5/12
STMICROELECTRONICS [ STMICROELECTRONICS ]
