Pin settings
L4973
2.2
Pin description
Table 1. Pin description
N° Pin
Name
DIP-18
11
10
SO-20
12
11
COMP
INH
E/A output to be used for frequency compensation
A logic signal (active high) disables the device (sleep
mode operation). If not used it must be connected to
GND; if floating the device is disabled.
A capacitor connected between this pin and the output
allows to drive the internal D-MOS.
Input/Output synchronization.
Unregulated DC input voltage
Stepdown regulator output.
Stepdown feedback input. Connecting the output
directly to this pin results in an output voltage of 3.3V for
the L4973V3.3 and 5.1V for L4973V5.1. An external
resistive divider is required for higher output voltages.
For output voltage resistive divider is required for higher
output voltages. For output voltage less than 3.3V, see
Note: 1
and
Reference voltage externally available.
Signal ground
An external resistor connected between the unregulated
input voltage and Pin 1 and a capacitor connected from
Pin 1 to ground fixes the switching frequency. (Line feed
forward is automatically obtained)
Description
9
18
7,8
2,3
10
20
8,9
2,3
BOOT
SYNC
V
CC
OUT
12
13
VFB
16
4,5,6
13,14,15
18
4,5,6,7
14,15,16,17
V5.1
GND
1
1
OSC
Note:
1
The maximum power dissipation of the package must be observed.
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