HCC/HCF4051B/52B/53B
TYPICAL APPLICATIONS
TYPICAL TIME-DIVISION APPLICATION OF THE 4052B
SPECIAL CONSIDERATIONS
Control of analog signals up to 20V peak-to-peak
can be achieved by digital signal amplitudes of 4.5
to 20V (if V
DD
– V
SS
= 3V, a V
DD
– V
EE
of up to 13V
can be controlled ; for V
DD
– V
EE
level differences
above 13V, a V
DD
– V
SS
of at least 4.5V is required).
For example, if V
DD
= + 5V, V
SS
= 0, and V
EE
=
–13.5V, analog signals from – 13.5V to + 4.5V can
be controlled by digital inputs of 0 to 4.5V. In certain
applications, the external load-resistor current may
include both V
DD
and signal-line components. To
avoid drawing V
DD
current when switch current
flows into the transmission gate inputs, the voltage
drop across the bidirectional switch must not exceed
0,8 volt (valvulated from R
ON
values shown in
ELECTRICAL CHARACTERISTICS CHART). No
V
DD
current will flow through R
L
if the switch current
flows into lead 3 on the
HCC/HCF4051
; leads 3 and
13 on the
HCC/HCF4052
; leads 4, 14, and 15 on
the
HCC/HCF4053.
9/17
STMICROELECTRONICS [ STMICROELECTRONICS ]
