欢迎访问ic37.com |
会员登录 免费注册
发布采购

93C56 参数 Datasheet PDF下载

93C56图片预览
型号: 93C56
PDF下载: 下载PDF文件 查看货源
内容描述: 16Kbit的, 8Kbit , 4k位, 2Kbit , 1K位, 256位和8位或16位宽 [16Kbit, 8Kbit, 4Kbit, 2Kbit, 1Kbit and 256bit 8-bit or 16-bit wide]
分类和应用:
文件页数/大小: 31 页 / 612 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号93C56的Datasheet PDF文件第6页浏览型号93C56的Datasheet PDF文件第7页浏览型号93C56的Datasheet PDF文件第8页浏览型号93C56的Datasheet PDF文件第9页浏览型号93C56的Datasheet PDF文件第11页浏览型号93C56的Datasheet PDF文件第12页浏览型号93C56的Datasheet PDF文件第13页浏览型号93C56的Datasheet PDF文件第14页  
M93C86, M93C76, M93C66, M93C56, M93C46  
Erase All  
Write All  
The Erase All Memory (ERAL) instruction erases  
the whole memory (all memory bits are set to 1).  
The format of the instruction requires that a dum-  
my address be provided. The Erase cycle is con-  
ducted in the same way as the Erase instruction  
(ERASE). The completion of the cycle can be de-  
tected by monitoring the Ready/Busy line, as de-  
scribed in the READY/BUSY STATUS section.  
As with the Erase All Memory (ERAL) instruction,  
the format of the Write All Memory with same Data  
(WRAL) instruction requires that a dummy ad-  
dress be provided. As with the Write Data to Mem-  
ory (WRITE) instruction, the format of the Write All  
Memory with same Data (WRAL) instruction re-  
quires that an 8-bit data byte, or 16-bit data word,  
be provided. This value is written to all the ad-  
dresses of the memory device. The completion of  
the cycle can be detected by monitoring the  
Ready/Busy line, as described next.  
Figure 6. WRAL Sequence  
WRITE  
ALL  
S
D
Q
CHECK  
STATUS  
1 0 0 0 1 Xn X0 Dn  
D0  
ADDR  
OP  
DATA IN  
BUSY  
READY  
CODE  
AI00880C  
Note: For the meanings of Xn and Dn, please see Table 5., Table 6. and Table 7..  
10/31