DESIGN APPLICATION NOTE --- AN022
SGA-9289 Amplifier Application Circuits
All HBT amplifiers are subject to device current
variation due to the decreasing nature of the internal
V
BE
with increasing temperature. In the absence of an
active bias circuit or resistive feedback, the decreasing
V
BE
will result in increased base and collector
currents. As the collector current continues to increase
under constant V
CE
conditions the device may
eventually exceed its maximum dissipated power limit
resulting in permanent device damage. The designs
included in this application note contain passive bias
circuits that stabilize the device current over
temperature and desensitize the circuit to device
process variation.
The passive bias circuits used in these designs include
a dropping resistor in the collector bias line and a
voltage divider from collector-to-base. Using this
scheme the amplifier can be biased from a single
supply voltage. The collector-dropping resistor is sized
to drop 2-3V depending on the desired V
CE
. The
voltage divider from collector-to-base, in conjunction
with the dropping resistor, will stabilize the device
current over temperature. Configuring the voltage
divider such that the shunt current is 5-10 times larger
than the desired base current desensitizes the circuit
to device process variation. These two feedback
mechanisms are sufficient to insure consistent
performance over temperature and device process
variations. Note that the voltage drop is clearly
dependent on the nominal collector current and can be
adjusted to generate the desired V
CE
from a fixed
supply rail. The user should test the circuit over the
operational extremes to guarantee adequate
performance if the feedback mechanisms are reduced.
An active bias circuit can be implemented if the user
does not wish to sacrifice the voltage required by the
aforementioned passive circuit. There are various
active bias schemes suitable for HBTs. The user
should choose an active bias circuit that best meets
his cost, complexity and performance requirements.
Circuit Details
SMDI will provide the detailed layout (AutoCad format)
to users wishing to use the exact same layout and
PCB material shown in the following circuits. The
circuits recommended within this application note were
designed using the following PCB stack up:
Material: GETEKä ML200C
Core thickness: 0.031”
Copper cladding: 1oz both sides
Dielectric constant: 4.1
Dielectric loss tangent: 0.0089 (@ 1 GHz)
Customers not wishing to use the exact material and
layouts shown in this application note can design their
own PCB using the critical transmission line
impedances and phase lengths shown in the BOMs
and layouts.
Vcc
+
V
DROP
-
I
c
I
B
+
V
CE
I
SHUNT
-
Passive Bias Circuit Topology
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
2
http://www.stanfordmicro.com
EAN-101535 Rev A
STANFORD [ STANFORD MICRODEVICES ]
