FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
14.3 Flash Memory Programming Timing Diagrams with External Host Mode
T
SU
RST
T
ES
PSEN#
ALE/PROG#
EA#
T
T
RD
RD
P2[7:6] ,P3[7:6]
P3[5:4] ,P2[5:0] ,P1
P0
0000b
0030H
BFH
0000b
0031H
Device ID
1255 F46.0
Device ID = See Table 4-3, "Product Identification"
FIGURE 14-14: READ-ID
Reads chip signature and identification registers at the addressed location.
T
SU
RST
T
ES
PSEN#
T
ADS
ALE/PROG#
T
T
DH
PROG
EA#
P3[3]
T
PSB
P3[5:4], P2[5:0]
P3[7:6], P2[7:6]
A5H/55H
1001b
1255 F47.0
FIGURE 14-15: SELECT-BLOCK1 / SELECT-BLOCK0 (FOR SST89E516RD2/SST89V516RD2 ONLY)
Enables the selection of either of the flash memory blocks prior to issuing a Byte-Verify, Block-Erase, Sector-
Erase, or Byte-Program.
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
82
SST [ SILICON STORAGE TECHNOLOGY, INC ]
