8 Mbit Firmware Hub
SST49LF008A
Data Sheet
Three-Byte Sequence for
Software ID Exit and Reset
Addresses
R/C#
5555
2AAA
5555
OE#
T
WP
WE#
T
IDA
T
SW1
55
WPH
SW0
AA
SW2
F0
DQ
7-0
1161 F25.0
FIGURE 22: Software ID Exit and Reset (PP Mode)
V
IHT
V
V
INPUT
REFERENCE POINTS
OUTPUT
OT
IT
V
ILT
1161 F26.0
AC test inputs are driven at VIHT (0.9 VDD) for a logic “1” and VILT (0.1 VDD) for a logic “0”. Measurement reference points
for inputs and outputs are VIT (0.5 VDD) and VOT (0.5 VDD). Input rise and fall times (10% ↔ 90%) are <5 ns.
Note: VIT - VINPUT Test
VOT - VOUTPUT Test
VIHT - VINPUT HIGH Test
V
ILT - VINPUT LOW Test
FIGURE 23: AC Input/Output Reference Waveforms (PP Mode)
TO TESTER
TO DUT
C
L
1161 F27.0
FIGURE 24: A Test Load Example (PP Mode)
©2006 Silicon Storage Technology, Inc.
S71161-11-000
3/06
33
SST [ SILICON STORAGE TECHNOLOGY, INC ]
