1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39SF010A / SST39SF020A / SST39SF040
Preliminary Specification
TABLE 5: DC OPERATING CHARACTERISTICS VDD = 5.0V±10%
Limits
Max Units Test Conditions
Address input=VIL/VIH, at f=1/TRC Min
Symbol Parameter
Min
IDD
Power Supply Current
VDD=VDD Max
Read
Write
25
25
3
mA
mA
mA
CE#=OE#=VIL, WE#=VIH, all I/Os open
CE#=WE#=VIL, OE#=VIH
CE#=VIH, VDD=VDD Max
ISB1
ISB2
Standby VDD Current
(TTL input)
Standby VDD Current
(CMOS input)
100
µA
CE#=VIHC, VDD=VDD Max
ILI
Input Leakage Current
Output Leakage Current
Input Low Voltage
1
µA
µA
V
VIN=GND to VDD, VDD=VDD Max
VOUT=GND to VDD, VDD=VDD Max
VDD=VDD Min
ILO
10
0.8
VIL
VIH
VIHC
VOL
VOH
Input High Voltage
2.0
V
VDD=VDD Max
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
VDD-0.3
V
VDD=VDD Max
0.4
V
IOL=2.1 mA, VDD=VDD Min
IOH=-400 µA, VDD=VDD Min
2.4
V
T5.4 398
TABLE 6: RECOMMENDED SYSTEM POWER-UP TIMINGS
Symbol
Parameter
Minimum
100
Units
1
TPU-READ
Power-up to Read Operation
Power-up to Program/Erase Operation
µs
µs
1
TPU-WRITE
100
T6.1 398
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 7: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
VI/O = 0V
Maximum
1
CI/O
I/O Pin Capacitance
Input Capacitance
12 pF
6 pF
1
CIN
VIN = 0V
T7.0 398
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 8: RELIABILITY CHARACTERISTICS
Symbol
Parameter
Endurance
Data Retention
Latch Up
Minimum Specification
Units
Test Method
1
NEND
10,000
100
Cycles JEDEC Standard A117
1
TDR
Years
mA
JEDEC Standard A103
JEDEC Standard 78
1
ILTH
100 + IDD
T8.1 398
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71147-02-000 5/01 398
8
SST [ SILICON STORAGE TECHNOLOGY, INC ]
