16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory
SST34HF1602C / SST34HF1622C / SST34HF1642C
SST34HF1642D / SST34HF1682D / SST34HF1622S / SST34HF1642S
Advance Information
TABLE 3: PIN DESCRIPTION
Symbol
Pin Name
Functions
AMS1 to A0 Address Inputs
To provide flash address, A19-A0.
To provide (P)SRAM address, AMS-A0
SA
SRAM x8 Address
To provide additional address for x8 SRAM
DQ14-DQ0 Data Inputs/Outputs
To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a flash Erase/Program cycle. The outputs are in
tri-state when OE# is high or BES1# is high or BES2 is low and BEF# is high.
DQ15/A-1
Data Input/Output
and LBS Address
DQ15 is used as data I/O pin when in x16 mode (CIOF = “1”)
A-1 is used as the LBS address pin when in x8 mode (CIOF = “0”)
BEF#
BES1#
BES2
OEF#2
OES#2
WEF#2
WES#2
OE#
Flash Memory Bank Enable
To activate the Flash memory bank when BEF# is low
(P)SRAM Memory Bank Enable To activate the (P)SRAM memory bank when BES1# is low
(P)SRAM Memory Bank Enable To activate the (P)SRAM memory bank when BES2 is high
Output Enable
Output Enable
Write Enable
To gate the data output buffers for Flash2 only
To gate the data output buffers for SRAM2 only
To control the Write operations for Flash2 only
To control the Write operations for SRAM2 only
To gate the data output buffers
Write Enable
Output Enable
Write Enable
WE#
To control the Write operations
CIOF
Byte Selection for Flash
When low, select Byte mode. When high, select Word mode.
UBS#
LBS#
WP#
Upper Byte Control ((P)SRAM) To enable DQ15-DQ8
Lower Byte Control ((P)SRAM) To enable DQ7-DQ0
Write Protect
To protect and unprotect the top 8 KWord (4 sectors) from Erase or Program
operation
RST#
Reset
To Reset and return the device to Read mode
RY/BY#
Ready/Busy#
To output the status of a Program or Erase Operation
RY/BY# is a open drain output, so a 10KΩ- 100KΩpull-up resistor is required to
allow RY/BY# to transition high indicating the device is ready to read.
2
VSSF
Ground
Flash2 only
SRAM2 only
2
VSSS
Ground
VSS
Ground
VDDF
VDDS
NC
Power Supply (Flash)
Power Supply ((P)SRAM)
No Connection
2.7-3.3V Power Supply to Flash only
2.7-3.3V Power Supply to (P)SRAM only
Unconnected pins
T3.0 1256
1. AMS = Most Significant Address
MS = A16 for SST34HF1622C/S, A17 for SST34HF1642C/D/S, and A18 for SST34HF1682D
A
2. LS package only
©2004 Silicon Storage Technology, Inc.
S71256-00-000
3/04
11
SST [ SILICON STORAGE TECHNOLOGY, INC ]
