256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit Multi-Purpose Flash
SST27SF256 / SST27SF512 / SST27SF010 / SST27SF020
Data Sheet
TABLE 10: RECOMMENDED SYSTEM POWER-UP TIMINGS
Symbol
Parameter
Minimum
100
Units
µs
1
TPU-READ
Power-up to Read Operation
Power-up to Write Operation
1
TPU-WRITE
100
µs
T10.1 502
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 11: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
VI/O = 0V
Maximum
1
CI/O
I/O Pin Capacitance
Input Capacitance
12 pF
6 pF
1
CIN
VIN = 0V
T11.0 502
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 12: RELIABILITY CHARACTERISTICS
Symbol
Parameter
Endurance
Data Retention
Latch Up
Minimum Specification
Units
Test Method
1
NEND
1000
100
Cycles JEDEC Standard A117
1
TDR
Years
mA
JEDEC Standard A103
JEDEC Standard 78
1
ILTH
100
T12.2 502
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
AC CHARACTERISTICS
TABLE 13: READ CYCLE TIMING PARAMETERS VDD = 5.0V±10% (Ta = 0°C to +70°C (Commercial))
SST27SF256-70
SST27SF512-70
SST27SF010-70
SST27SF020-70
SST27SF256-90
SST27SF512-90
SST27SF010-90
SST27SF020-90
Symbol
TRC
Parameter
Min
Max
Min
Max
Units
ns
Read Cycle Time
70
90
TCE
Chip Enable Access Time
Address Access Time
70
70
35
90
90
45
ns
TAA
ns
TOE
Output Enable Access Time
CE# Low to Active Output
OE# Low to Active Output
CE# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
ns
1
TCLZ
0
0
0
0
ns
1
TOLZ
ns
1
TCHZ
25
25
30
30
ns
1
TOHZ
ns
1
TOH
0
0
ns
T13.1 502
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71152-02-000 5/01 502
10
SST [ SILICON STORAGE TECHNOLOGY, INC ]
