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SST27SF020-70-3C-NHE 参数 Datasheet PDF下载

SST27SF020-70-3C-NHE图片预览
型号: SST27SF020-70-3C-NHE
PDF下载: 下载PDF文件 查看货源
内容描述: 512千位/ 1兆位/ 2兆位( X8 )许多时间内可编程Flash [512 Kbit / 1 Mbit / 2 Mbit (x8) Many-Time Programmable Flash]
分类和应用:
文件页数/大小: 23 页 / 327 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
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512 Kbit / 1 Mbit / 2 Mbit Many-Time Programmable Flash  
SST27SF512 / SST27SF010 / SST27SF020  
Data Sheet  
TABLE 6: PROGRAM/ERASE DC OPERATING CHARACTERISTICS FOR SST27SF512  
DD=4.5-5.5V, VPP=VPPH (TA=25°C±5°C)  
V
Limits  
Symbol Parameter  
Min Max Units Test Conditions  
IDD  
IPP  
ILI  
VDD Erase or Program Current  
30  
mA CE#=VIL, OE#/VPP=11.4-12V, VDD=VDD Max  
mA CE#=VIL, OE#/VPP=11.4-12V, VDD=VDD Max  
VPP Erase or Program Current  
Input Leakage Current  
3
1
µA  
µA  
V
VIN=GND to VDD, VDD=VDD Max  
VOUT=GND to VDD, VDD=VDD Max  
CE#=OE#/VPP=VIL,  
ILO  
VH  
IH  
Output Leakage Current  
Supervoltage for A9  
10  
11.4 12  
200  
Supervoltage Current for A9  
High Voltage for OE#/VPP Pin  
µA  
V
CE#=OE#/VPP=VIL, A9=VH Max  
VPPH  
11.4 12  
T6.5 1152  
TABLE 7: PROGRAM/ERASE DC OPERATING CHARACTERISTICS FOR SST27SF010/020  
DD=4.5-5.5V, VPP=VPPH (TA=25°C±5°C)  
V
Limits  
Symbol Parameter  
IDD VDD Erase or Program Current  
Min Max Units Test Conditions  
30  
mA CE#=PGM#=VIL, OE#=VIH, VPP=11.4-12V,  
VDD=VDD Max  
IPP  
VPP Erase or Program Current  
3
mA CE#=PGM#=VIL, OE#=VIH, VPP=11.4-12V,  
VDD=VDD Max  
ILI  
Input Leakage Current  
Output Leakage Current  
Supervoltage for A9  
1
10  
µA  
µA  
V
VIN =GND to VDD, VDD=VDD Max  
VOUT =GND to VDD, VDD=VDD Max  
CE#=OE#=VIL,  
ILO  
VH  
IH  
11.4 12  
200  
Supervoltage Current for A9  
High Voltage for VPP Pin  
µA  
V
CE#=OE#=VIL, A9=VH Max  
VPPH  
11.4 12  
T7.5 1152  
TABLE 8: RECOMMENDED SYSTEM POWER-UP TIMINGS  
Symbol  
Parameter  
Minimum  
100  
Units  
1
TPU-READ  
Power-up to Read Operation  
Power-up to Write Operation  
µs  
µs  
1
TPU-WRITE  
100  
T8.1 1152  
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.  
TABLE 9: CAPACITANCE (TA = 25°C, f=1 Mhz, other pins open)  
Parameter  
Description  
Test Condition  
VI/O = 0V  
Maximum  
1
CI/O  
I/O Pin Capacitance  
Input Capacitance  
12 pF  
6 pF  
1
CIN  
VIN = 0V  
T9.0 1152  
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.  
TABLE 10: RELIABILITY CHARACTERISTICS  
Symbol  
Parameter  
Minimum Specification  
Units  
Cycles  
Years  
Test Method  
1
NEND  
Endurance  
1000  
100  
JEDEC Standard A117  
JEDEC Standard A103  
1
TDR  
Data Retention  
T10.3 1152  
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.  
©2005 Silicon Storage Technology, Inc.  
S71152-11-000  
9/05  
8