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SST26VF016-80-5I-QE 参数 Datasheet PDF下载

SST26VF016-80-5I-QE图片预览
型号: SST26VF016-80-5I-QE
PDF下载: 下载PDF文件 查看货源
内容描述: 四路串行I / O ( SQI )快闪记忆体 [Serial Quad I/O (SQI) Flash Memory]
分类和应用:
文件页数/大小: 39 页 / 1252 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
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Serial Quad I/O (SQI) Flash Memory  
SST26VF016 / SST26VF032  
Data Sheet  
Instructions  
Instructions are used to read, write (erase and program), and configure the SST26VF016/032. The  
instruction bus cycles are two nibbles each for commands (Op Code), data, and addresses. Prior to  
executing any write instructions, the Write-Enable (WREN) instruction must be executed. The com-  
plete list of the instructions is provided in Table 3.  
All instructions are synchronized off a high to low transition of CE#. Inputs are accepted on the rising  
edge of SCK starting with the most significant nibble. CE# must be driven low before an instruction is  
entered and must be driven high after the last nibble of the instruction has been input (except for read  
instructions). Any low-to-high transition on CE# before receiving the last nibble of an instruction bus  
cycle, will terminate the instruction being entered and return the device to the standby mode.  
Table 3: Device Operation Instructions for SST26VF016/032 (1 of 2)  
Command  
Cycle1  
Address Dummy  
Data  
Maximum  
Instruction  
NOP  
Description  
Cycle(s)2 Cycle(s) Cycle(s) Frequency  
No Operation  
00H  
66H  
99H  
38H  
FFH  
03H  
0BH  
0
0
0
0
0
3
3
0
0
0
0
0
0
1
0
RSTEN  
RST3  
Reset Enable  
0
Reset Memory  
0
0
80 MHz  
33 MHz  
EQIO  
Enable Quad I/O  
Reset Quad I/O  
Read Memory  
RSTQIO4  
Read5  
0
1 to  
1 to ∞  
High-Speed  
Read5  
Read Memory at Higher Speed  
Set Burst6  
Read Burst  
Read PI7  
Set Burst Length  
C0H  
0CH  
08H  
0
3
1
0
1
1
1
nB Burst with Wrap  
n to ∞  
1 to ∞  
Jump to address within 256  
Byte page indexed by n  
Read I  
Jump to address within block  
indexed by n  
09H  
2
2
1 to ∞  
Read BI  
Jump to block Indexed by n  
JEDEC-ID Read  
10H  
9FH  
AFH  
20H  
D8H  
1
0
0
3
3
2
0
0
0
0
1 to ∞  
3 to ∞  
3 to ∞  
0
JEDEC-ID 5,8  
Quad J-ID8  
Sector Erase9  
Block Erase10  
Quad I/O J-ID Read  
Erase 4 KBytes of Memory Array  
80 MHz  
Erase 64, 32 or 8 KBytes of  
Memory Array  
0
Chip Erase  
Page Program  
Write Suspend  
Write Resume  
Read SID  
Program SID11  
Lockout SID11  
RDSR12  
Erase Full Array  
C7H  
02H  
B0H  
30H  
88H  
A5H  
85H  
05H  
06H  
04H  
0
3
0
0
1
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
Program 1 to 256 Data Bytes  
Suspends Program/Erase  
Resumes Program/Erase  
Read Security ID  
1 to 256  
0
0
1 to 32  
1 to 24  
0
Program User Security ID area  
Lockout Security ID Programming  
Read Status Register  
Write Enable  
1 to ∞  
0
WREN  
WRDI  
Write Disable  
0
©2010 Silicon Storage Technology, Inc.  
S71359-05-000  
06/10  
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