8 Mbit SPI Serial Flash
SST25VF080B
Data Sheet
Status Register
The software status register provides status on whether the
flash memory array is available for any Read or Write oper-
ation, whether the device is Write enabled, and the state of
the Memory Write protection. During an internal Erase or
Program operation, the status register may be read only to
determine the completion of an operation in progress.
Table 3 describes the function of each bit in the software
status register.
TABLE 3: Software Status Register
Default at
Bit Name
Function
Power-up
Read/Write
0
BUSY
1 = Internal Write operation is in progress
0 = No internal Write operation is in progress
0
R
1
WEL
1 = Device is memory Write enabled
0
R
0 = Device is not memory Write enabled
2
3
4
5
6
BP0
BP1
BP2
BP3
AAI
Indicate current level of block write protection (See Table 4)
Indicate current level of block write protection (See Table 4)
Indicate current level of block write protection (See Table 4)
Indicate current level of block write protection (See Table 4)
1
1
1
0
0
R/W
R/W
R/W
R/W
R
Auto Address Increment Programming status
1 = AAI programming mode
0 = Byte-Program mode
7
BPL
1 = BP3, BP2, BP1, BP0 are read-only bits
0 = BP3, BP2, BP1, BP0 are read/writable
0
R/W
T3.0 1296
Busy
Auto Address Increment (AAI)
The Busy bit determines whether there is an internal Erase
or Program operation in progress. A “1” for the Busy bit indi-
cates the device is busy with an operation in progress. A “0”
indicates the device is ready for the next valid operation.
The Auto Address Increment Programming-Status bit pro-
vides status on whether the device is in AAI programming
mode or Byte-Program mode. The default at power up is
Byte-Program mode.
Write Enable Latch (WEL)
The Write-Enable-Latch bit indicates the status of the inter-
nal memory Write Enable Latch. If the Write-Enable-Latch
bit is set to “1”, it indicates the device is Write enabled. If the
bit is set to “0” (reset), it indicates the device is not Write
enabled and does not accept any memory Write (Program/
Erase) commands. The Write-Enable-Latch bit is automati-
cally reset under the following conditions:
•
•
•
•
Power-up
Write-Disable (WRDI) instruction completion
Byte-Program instruction completion
Auto Address Increment (AAI) programming is
completed or reached its highest unprotected
memory address
•
•
•
•
Sector-Erase instruction completion
Block-Erase instruction completion
Chip-Erase instruction completion
Write-Status-Register instructions
©2010 Silicon Storage Technology, Inc.
S71296-04-000
01/10
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