512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit 1.8V SPI Serial Flash
SST25WF512 / SST25WF010 / SST25WF020 / SST25WF040
Data Sheet
TABLE 8: Software Status Register Block Protection for SST25WF040
Status Register Bit
Protection Level
None
1 (Upper Eighth Memory)
2 (Upper Quarter Memory)
3 (Upper Half Memory)
4 (Full Memory)
5 (Full Memory)
6 (Full Memory)
7 (Full Memory)
Protected Blocks
None
Blocks 14 through 15
Blocks 12 through 15
Blocks 8 through 15
Blocks 0 through 15
Blocks 0 through 15
Blocks 0 through 15
Blocks 0 through 15
BP2
1
0
0
0
0
1
1
1
1
BP1
0
0
1
1
0
0
1
1
BP0
0
1
0
1
0
1
0
1
Protected Memory Address
4 Mbit
None
70000H-7FFFFH
60000H-7FFFFH
40000H-7FFFFH
00000H-7FFFFH
00000H-7FFFFH
00000H-7FFFFH
00000H-7FFFFH
T8.0 1328
1. Default at power-up for BP2, BP1, and BP0 is ‘11’.
©2009 Silicon Storage Technology, Inc.
S71328-08-000
11/09
9
SST [ SILICON STORAGE TECHNOLOGY, INC ]
