FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
TABLE
9-1: SECURITY LOCK OPTIONS
Security Lock Bits1,2
Security Status of:
Block 1 Block 0
Unlock Unlock
Level
SFST[7:5]
000
SB1
U
SB21
U
SB31
U
Security Type
1
2
No Security Features are Enabled.
100
P
U
U
SoftLock
SoftLock
MOVC instructions executed from
external program memory are dis-
abled from fetching code bytes from
internal memory, EA# is sampled and
latched on Reset, and further pro-
gramming of the flash is disabled.
3
4
011
101
U
P
P
U
P
P
Hard Lock
SoftLock
Hard Lock
SoftLock
Level 2 plus Verify disabled, both
blocks locked.
010
U
P
U
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0 and vice
versa.
110
001
P
U
P
U
U
P
Hard Lock
Hard Lock
SoftLock
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0.
111
P
P
P
Hard Lock
Same as Level 3 hard lock/hard lock,
but MCU will start code execution
from the internal memory regardless
of EA#.
T9-1.0 1255
1. P = Programmed (Bit logic state = 0), U = Unprogrammed (Bit logic state = 1).
2. SFST[7:5] = Security Lock Status Bits (SB1_i, SB2_i, SB3_i)
9.4 Read Operation Under Lock Condition
The status of security bits SB1, SB2, and SB3 can be read
when the read command is disabled by security lock.
There are three ways to read the status.
1. External host mode: Read-back = 00H (locked)
2. IAP command: Read-back = previous SFDT data
3. MOVC: Read-back = FFH (blank)
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
61
SST [ SILICON STORAGE TECHNOLOGY, INC ]
