W40S11-02
DC Electrical Characteristics: TA = 0°C to +70°C, VDD = 3.3V 5ꢀ
Parameter
IDD
Description
3.3V Supply Current
3.3V Supply Current
Test Condition/Comments
at 66 MHz
Min
Typ
120
185
5
Max
160
220
10
Unit
mA
mA
mA
IDD
at 100 MHz
IDD Tristate
3.3V Supply Current in
Three-State
Logic Inputs
VIL
Input Low Voltage
VSS – 0.3
2.0
0.8
VDD + 0.5
+5
V
V
VIH
Input High Voltage
IILEAK
Input Leakage Current, BUF_IN
Input Leakage Current[3]
–5
µA
µA
IILEAK
–20
+5
Logic Outputs (SDRAM0:9)[4]
VOL
VOH
IOL
Output Low Voltage
Output High Voltage
Output Low Current
Output High Current
IOL = 1 mA
IOH = –1 mA
VOL = 1.5V
VOH = 1.5V
50
mV
V
3.1
70
65
110
100
185
160
mA
mA
IOH
Pin Capacitance/Inductance
CIN Input Pin Capacitance
5
6
7
pF
pF
nH
COUT
Output Pin Capacitance
Input Pin Inductance
LIN
Note:
3. OE, SDATA, and SCLOCK logic pins have a 250-k: internal pull-up resistor (V – 0.8V).
DD
4. All SDRAM outputs loaded by 6" transmission lines with 22-pF capacitors on ends.
AC Electrical Characteristics: TA = 0°C to +70°C, VDD = 3.3V 5ꢀ (Lump Capacitance Test Load = 30 pF)
Parameter
fIN
Description
Input Frequency
Test Condition
Min
0
Typ
Max
133
4.0
4.0
250
250
8.0
8.0
5.0
5.0
55
Unit
MHz
V/ns
V/ns
ps
tR
Output Rise Edge Rate
Output Fall Edge Rate
Output Skew, Rising Edges
Output Skew, Falling Edges
Output Enable Time
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
1.5
1.5
tF
tSR
tSF
tEN
tDIS
tPR
tPF
tD
ps
1.0
1.0
1.0
1.0
45
ns
Output Disable Time
ns
Rising Edge Propagation Delay
Falling Edge Propagation Delay
Duty Cycle
ns
ns
Measured at 1.5V
ꢀ
Zo
AC Output Impedance
15
:
Rev 1.0,Dec. 01, 2006
Page 7 of 9