W40S11-02
Writing Data Bytes
Table 2 gives the bit formats for registers located in Data Bytes
0–6.
Each bit in the data bytes control a particular device function.
Bits are written most significant bit (MSB) first, which is bit 7.
Table 2. Data Bytes 0–2 Serial Configuration Map[2]
Affected Pin
Bit Control
Bit(s)
Pin No.
Pin Name
Control Function
0
1
Data Byte 0 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
6
5
4
3
2
1
0
N/A
N/A
N/A
N/A
7
Reserved
Reserved
Reserved
Reserved
SDRAM3
SDRAM2
SDRAM1
SDRAM0
(Reserved)
--
--
--
--
(Reserved)
(Reserved)
--
--
(Reserved)
--
--
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Low
Low
Low
Low
Active
Active
Active
Active
6
3
2
Data Byte 1 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
6
5
4
3
2
1
0
27
26
SDRAM7
SDRAM6
SDRAM5
SDRAM4
Reserved
Reserved
Reserved
Reserved
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
(Reserved)
Low
Low
Low
Low
--
Active
Active
Active
Active
--
23
22
N/A
N/A
N/A
N/A
(Reserved)
--
--
(Reserved)
--
--
(Reserved)
--
--
Data Byte 2 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
6
5
4
3
2
1
0
18
SDRAM9
SDRAM8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Clock Output Disable
Clock Output Disable
(Reserved)
Low
Low
--
Active
11
Active
N/A
N/A
N/A
N/A
N/A
N/A
--
--
--
--
--
--
(Reserved)
--
(Reserved)
--
(Reserved)
--
(Reserved)
--
(Reserved)
--
Note:
2. At power-up all SDRAM outputs are enabled and active. It is recommended to program Bits 4–7 of Byte0 and Bits 0–3 of Byte1 to a “0” to save power and reduce
noise.
Rev 1.0,Dec. 01, 2006
Page 3 of 9
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