SL23EP09
AC Electrical Specifications (VDD=3.3V and 2.5V)
Symbol
Description
Condition
Min
10
10
10
10
25
40
47
45
–
Typ
–
Max
220
167
200
133
75
Unit
MHz
MHz
MHz
MHz
%
FMAX
Maximum Frequency [1]
(Input=Output )
3.3V High Drive
3.3V Standard Drive
–
2.5V High Drive
–
2.5V Standard Drive
–
INDC
Input Duty Cycle
<135 MHz, VDD=3.3V
–
<135 MHz, VDD=2.5V
–
60
%
OUTDC Output Duty Cycle[2]
<135 MHz, VDD=3.3V
–
53
%
<135 MHz, VDD=2.5V
55
%
tr/f3.3
Rise, Fall Time (3.3V) [2]
(Measured at: 0.8 to 2.0V)
Std drive, CL = 30 pF, <100 MHz
Std drive, CL = 22 pF, <135 MHz
Std drive, CL = 15 pF, <170 MHz
High drive, CL = 30 pF, <100 MHz
High drive, CL = 22 pF, <135 MHz
High drive, CL = 15 pF, >135 MHz
Std drive, CL = 15 pF, <135 MHz
High drive, CL = 30 pF, <100 MHz
High drive, CL = 22 pF, <135 MHz
High drive, CL = 15 pF, >135 MHz
–
–
–
–
–
–
–
–
–
–
1.6
1.6
0.6
1.2
1.2
0.5
1.5
2.1
1.3
1.2
ns
–
ns
–
ns
–
ns
–
ns
–
ns
tr/f2.5
Rise, Fall Time (2.5) [2]
–
ns
(Measured at: 0.6 to 1.8V)
–
ns
–
ns
–
ns
t1
t2
t3
Output-to-Output Skew [9]
(Measured at VDD/2)
All outputs CL=0, 3.3V supply, 2.5 power
supply, standard drive
–
–
45
–
100
110
ps
ps
All outputs CL=0, 2.5V power supply, high
drive
Delay Time, CLKIN Rising
Edge to CLKOUT Rising
Edge[2]
PLL Bypass mode
PLL enabled @ 3.3V
PLL enabled @2.5V
1.5
–
–
–
4.4
100
200
ns
ps
ps
–100
–200
(Measured at VDD/2)
Part-to-Part Skew[2]
(Measured at VDD/2)
Measured at VDD/2. Any output to any
output, 3.3V supply
–
–
–
–
150
300
ps
ps
Measured at VDD/2. Any output to any
output, 2.5V supply
Notes:
1. For the given maximum loading conditions. See CL in Operating Conditions Table.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Rev 1.1, February 2, 2007
Page 7 of 13