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SL23EP04NZZI-1 参数 Datasheet PDF下载

SL23EP04NZZI-1图片预览
型号: SL23EP04NZZI-1
PDF下载: 下载PDF文件 查看货源
内容描述: 低抖动和偏斜DC至220 MHz的时钟缓冲器 [Low Jitter and Skew DC to 220 MHz Clock Buffer]
分类和应用: 时钟
文件页数/大小: 12 页 / 150 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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SL23EP04NZ  
External Components & Design Considerations  
Typical Application Schematic  
Comments and Recommendations  
Decoupling Capacitor: A decoupling capacitor of 0.1ȝF must be used between VDD and VSS pins. Place the  
capacitor on the component side of the PCB as close to the VDD pin as possible. The PCB trace to the VDD pin and  
to the GND via should be kept as short as possible. Do not use vias between the decoupling capacitor and the VDD  
pin.  
Series Termination Resistor: A series termination resistor is recommended if the distance between the output  
clocks and the load is over 1 ½ inch. Place the series termination resistors as close to the clock outputs as possible.  
Rev 1.1, April 16, 2007  
Page 10 of 12  
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