CY28447
Test and Measurement Set-up
For Single-ended Signals and Reference
The following diagram shows test load configurations for the
single-ended PCI, USB, and REF output signals.
Measurement
Point
ꢁꢁ:
PCI/
USB
ꢂꢃ:
5pF
Measurement
Point
ꢄꢅ:
ꢄꢅ:
ꢂꢃ:
ꢂꢃ:
5pF
REF
Measurement
Point
5pF
Figure 15.Single-ended Load Configuration Low Drive Option
Measurement
Point
5pF
ꢄꢅ:
ꢂꢃ:
ꢂꢃ:
Measurement
Point
5pF
ꢄꢅ:
PCI/
USB
Measurement
Point
ꢄꢅ:
ꢂꢃ:
5pF
Measurement
Point
ꢄꢅ:
ꢄꢅ:
REF
ꢂꢃ:
ꢂꢃ:
5pF
Measurement
Point
5pF
Figure 16. Single-ended Load Configuration High Drive Option
The following diagram shows the test load configuration for the
differential CPU and SRC outputs.
M e a s u re m e n t
P o in t
ꢁ ꢁ :
C P U T
S R C T
2 p F
D O T 9 6 T
9 6 _ 1 0 0 _ S S C T
ꢆ ꢇ ꢈꢇ :
ꢄ ꢃ ꢃ : ꢀD iffe re n tia l
M e a s u re m e n t
P o in t
C P U C
S R C C
D O T 9 6 C
ꢁ ꢁ :
2 p F
ꢆ ꢇ ꢈꢇ :
9 6 _ 1 0 0 _ S S C C
IR E F
ꢆ ꢉ ꢊ :
Figure 17. 0.7V Differential Load Configuration
Rev 1.0,November 20, 2006
Page 20 of 21