CY28442-2
S2
S1
VTT_PWRGD# = Low
Delay
>0.25mS
Sample
Inputs straps
VDD_A = 2.0V
Wait for <1.8ms
S0
S3
VDD_A = off
Normal
Operation
Enable Outputs
Power Off
VTT_PWRGD# = toggle
Figure 13. Clock Generator Power-up/Run State Diagram
Absolute Maximum Conditions
Parameter
VDD
Description
Core Supply Voltage
Condition
Min.
–0.5
–0.5
Max.
4.6
Unit
V
VDD_A
VIN
Analog Supply Voltage
4.6
V
Input Voltage
Relative to VSS
–0.5 VDD + 0.5 VDC
TS
Temperature, Storage
Non-functional
–65
150
85
150
20
60
–
°C
°C
TA
Temperature, Operating Ambient
Temperature, Junction
Functional
0
–
TJ
Functional
°C
ØJC
Dissipation, Junction to Case
Dissipation, Junction to Ambient
ESD Protection (Human Body Model)
Flammability Rating
Mil-STD-883E Method 1012.1
JEDEC (JESD 51)
MIL-STD-883, Method 3015
At 1/8 in.
–
°C/W
°C/W
V
ØJA
–
ESDHBM
UL-94
MSL
2000
V–0
1
Moisture Sensitivity Level
Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
DC Electrical Specifications
Parameter
All VDDs
Description
Condition
Min.
Max.
Unit
V
3.3V Operating Voltage
Input Low Voltage
3.3 5%
3.135
3.465
VILI2C
VIHI2C
VIL_FS
VIH_FS
VILFS_C
VIMFS_C
VIHFS_C
VIL
SDATA, SCLK
SDATA, SCLK
–
1.0
V
Input High Voltage
2.2
–
V
FS_[A,B] Input Low Voltage
FS_[A,B] Input High Voltage
FS_C Input Low Voltage
FS_C Input Middle Voltage
FS_C Input High Voltage
3.3V Input Low Voltage
3.3V Input High Voltage
Input Low Leakage Current
Input High Leakage Current
3.3V Output Low Voltage
3.3V Output High Voltage
VSS – 0.3
0.35
V
0.7
VDD + 0.5
V
VSS – 0.3
0.35
V
0.7
1.8
V
1.8
VDD + 0.5
V
VSS – 0.3
0.8
V
VIH
2.0
–5
–
VDD + 0.3
V
IIL
Except internal pull-up resistors, 0 < VIN < VDD
Except internal pull-down resistors, 0 < VIN < VDD
IOL = 1 mA
5
5
PA
PA
V
IIH
VOL
–
0.4
–
VOH
IOH = –1 mA
2.4
V
Rev 1.0,November 21, 2006
Page 14 of 19
SPECTRALINEAR [ SPECTRALINEAR INC ]
