CY28325-3
Data Byte Configuration Map
Data Byte 0
Power-on
Default
Bit
7
Pin#
Name
Reserved
Description
–
–
–
–
–
Reserved
0
6
SEL2
SW Frequency selection bits. Refer to Frequency Selection Table
SW Frequency selection bits. Refer to Frequency Selection Table
SW Frequency selection bits. Refer to Frequency Selection Table
0
0
0
0
5
SEL1
4
SEL0
3
FS_Override
0 = Select operating frequency by FS[4:0] input pins
1 = Select operating frequency by SEL[4:0] settings
2
1
0
–
–
–
SEL4
SW Frequency selection bits. Refer to Frequency Selection Table
SW Frequency selection bits. Refer to Frequency Selection Table
Reserved
0
0
0
SEL3
Reserved
Data Byte 1
Power-on
Default
Bit
7
Pin#
Name
Description
Reserved
–
–
–
–
Reserved
0
0
0
0
6
Spread Select2
Spread Select1
Spread Select0
“000” = OFF
5
“001” = Reserved
“010” = Reserved
‘011” = Reserved
“100“ = 0.25%
“101“ = – 0.5%
4
“110“= 0.5%
“111“ = 0.38%
3
2
1
0
42, 41 CPUT_CS, CPUC_CS (Active/Inactive)
1
1
1
1
35, 34 CPUT_1, CPUC_1
40, 39 CPUT_0, CPUC_0
(Active/Inactive)
(Active/Inactive)
–
CPU_CS_F STOP
Control
1 = CPUT_CS_F and CPUC_CS_F are Free-running outputs
0 = CPUT_CS_F and CPUC_CS_F will be disabled when
CPU_STOP# is active
Data Byte 2
Power-on
Default
Bit
7
Pin#
21
19
18
17
15
14
12
11
Name
Pin Description
1 = Enabled, 0 = Disabled
1 = Enabled, 0 = Disabled
1 = Enabled, 0 = Disabled
1 = Enabled, 0 = Disabled
1 = Enabled, 0 = Disabled
1 = Enabled, 0 = Disabled
1 = Enabled, 0 = Disabled
1 = Enabled, 0 = Disabled
PCI8
PCI7
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
1
1
1
1
1
1
1
1
6
5
4
3
2
1
0
Data Byte 3
Power-on
Default
Bit
Pin#
Name
Pin Description
7
–
Reserved
Reserved
0
Rev 1.0,November 21, 2006
Page 7 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
