Da ta
Shee t
(Prelimi nar y)
3.7
EDC Operation — S34ML02G1 and S34ML04G1
Error Detection Code check is a feature that can be used during the copy back operation (both single and
multiplane) to detect single bit errors occurring in the source page(s).
Note:
The S34ML01G1 device does not support EDC.
EDC check allows detection of up to 1 single bit error every 528 bytes, where each 528 byte group is
composed of 512 bytes of main array and 16 bytes of spare area (see
and
The described 528-byte area is called an “EDC unit.”
In the x16 device, EDC allows detection of up to 1 single bit error every 264 words, where each 264 word
group is composed by 256 words of main array and 8 words of spare area see
and
The described 264-word area is called
“EDC
unit.”
EDC results can be checked through a specific Read EDC register command, available only after issuing a
Copy Back Program or a Multiplane Copy Back Program. The EDC register can be queried during the copy
back program busy time (t
PROG
).
For the “EDC check” feature to operate correctly, specific conditions on data input handling apply for program
operations.
For the case of Page Program, Multiplane Page Program, Page Reprogram, Multiplane Page Reprogram,
Cache Program, and Multiplane Cache Program operations:
In
it was explained that a number of consecutive partial program operations (NOP)
is allowed within the same page. In case this feature is used, the number of partial program operations
occurring in the same EDC unit must not exceed 1. In other words, page program operations must be
performed on the whole page, or on whole EDC unit at a time.
“Random Data Input” in a given EDC unit can be executed several times during one page program
sequence, but data cannot be written to any column address more than once before the program is
initiated.
For the case of Copy Back Program or Multiplane Copy Back Program operations:
If Random Data Input is applied in a given EDC unit, the entire EDC unit must be written to the page buffer.
In other words, the EDC check is possible only if the whole EDC unit is modified during one Copy Back
Program sequence.
“Random Data Input” in a given EDC unit can be executed several times during one Copy Back Program
sequence, but data insertion in each column address of the EDC unit must not exceed 1.
If you use copy back without EDC check, none of the limitations described above apply.
After a Copy Back Program operation, the host can use Read EDC Status Register to check the status of
both the program operation and the Copy Back Read. If the EDC was valid and an error was reported in the
EDC (see
the host may perform Special Read For Copy Back on the source page and
attempt the Copy Back Program again. If this also fails, the host can execute a Page Read operation in order
to correct a single bit error with external ECC software or hardware.
September 6, 2012 S34ML01G1_04G1_10
Spansion
®
SLC NAND Flash Memory for Embedded
23