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S29GL128P90FFI012 参数 Datasheet PDF下载

S29GL128P90FFI012图片预览
型号: S29GL128P90FFI012
PDF下载: 下载PDF文件 查看货源
内容描述: 3.0伏只页面模式闪存具有90纳米的MirrorBit工艺技术 [3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology]
分类和应用: 闪存
文件页数/大小: 77 页 / 2742 K
品牌: SPANSION [ SPANSION ]
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Da ta
Shee t
(Prelimi nar y)
Table 6.4
S29GL128P Sector & Memory Address Map
Uniform Sector
Size
Sector
Count
Sector
Range
SA00
64 Kword/128 Kb
128
:
SA127
Address Range (16-bit)
0000000h - 000FFFFh
:
07F0000 - 7FFFFF
Sector Ending Address
Notes
Sector Starting Address
Note
This table has been condensed to show sector-related information for an entire device on a single page. Sectors and their address ranges
that are not explicitly listed (such as SA001-SA510) have sector starting and ending addresses that form the same pattern as all other
sectors of that size. For example, all 128 Kb sectors have the pattern xxx0000h-xxxFFFFh.
7. Device Operations
This section describes the read, program, erase, handshaking, and reset features of the Flash devices.
Operations are initiated by writing specific commands or a sequence with specific address and data patterns
into the command registers (see
through
The command register itself does not
occupy any addressable memory location; rather, it is composed of latches that store the commands, along
with the address and data information needed to execute the command. The contents of the register serve as
input to the internal state machine and the state machine outputs dictate the function of the device. Writing
incorrect address and data values or writing them in an improper sequence may place the device in an
unknown state, in which case the system must pull the RESET# pin low or power cycle the device to return
the device to the reading array data mode.
7.1
Device Operation Table
The device must be setup appropriately for each operation.
describes the required state of each
control pin for any particular operation.
Table 7.1
Device Operations
Addresses
A
IN
A
IN
A
IN
X
X
X
DQ8–DQ15
DQ0–DQ7
D
OUT
High-Z
High-Z
High-Z
BYTE#= V
IH
D
OUT
High-Z
High-Z
High-Z
BYTE#= V
IL
DQ8–DQ14
= High-Z,
DQ15 = A-1
High-Z
High-Z
High-Z
Operation
Read
Write (Program/Erase)
Accelerated Program
Standby
Output Disable
Reset
CE#
L
L
L
V
CC
±
0.3 V
L
X
OE#
L
H
H
X
H
X
WE#
H
L
L
X
H
X
RESET#
H
H
H
V
CC
±
0.3 V
H
L
WP#/ACC
X
V
HH
H
X
X
Legend
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
HH
= 11.5–12.5V, X = Don’t Care, A
IN
= Address In, D
IN
= Data In, D
OUT
= Data Out
Notes
1. Addresses are AMax:A0 in word mode; A
Max
:A-1 in byte mode.
2. If WP# = V
IL
, on the outermost sector remains protected. If WP# = V
IH
, the outermost sector is unprotected. WP# has an internal pull-up; when unconnected,
WP# is at V
IH
. All sectors are unprotected when shipped from the factory (The Secured Silicon Sector can be factory protected depending on version ordered.)
3. D
IN
or D
OUT
as required by command sequence, data polling, or sector protect algorithm.
November 8, 2007 S29GL-P_00_A7
S29GL-P MirrorBit
®
Flash Family
19