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S29GL128P90FAIR12 参数 Datasheet PDF下载

S29GL128P90FAIR12图片预览
型号: S29GL128P90FAIR12
PDF下载: 下载PDF文件 查看货源
内容描述: 3.0伏只页面模式闪存具有90纳米的MirrorBit工艺技术 [3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology]
分类和应用: 闪存
文件页数/大小: 77 页 / 2742 K
品牌: SPANSION [ SPANSION ]
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D a t a S h e e t ( P r e l i m i n a r y )  
Table 7.15 Unlock Bypass Program  
(LLD Function = lld_UnlockBypassProgramCmd)  
Cycle  
Description  
Operation  
Write  
Word Address  
Base +xxxh  
Data  
00A0h  
1
2
Program Setup Command  
Program Command  
Write  
Program Address  
Program Data  
/* Example: Unlock Bypass Program Command */  
/* Do while in Unlock Bypass Entry Mode!  
*/  
/* write program setup command  
/* write data to be programmed  
*( (UINT16 *)base_addr ) = 0x00A0;  
*/  
*( (UINT16 *)pa )  
= data;  
*/  
*/  
/* Poll until done or error.  
/* If done and more to program, */  
/* do above two cycles again. */  
Table 7.16 Unlock Bypass Reset  
(LLD Function = lld_UnlockBypassResetCmd)  
Cycle  
Description  
Reset Cycle 1  
Reset Cycle 2  
Operation  
Write  
Word Address  
Data  
0090h  
0000h  
1
2
Base +xxxh  
Base +xxxh  
Write  
/* Example: Unlock Bypass Exit Command */  
*( (UINT16 *)base_addr ) = 0x0090;  
*( (UINT16 *)base_addr ) = 0x0000;  
7.8  
Write Operation Status  
The device provides several bits to determine the status of a program or erase operation. The following  
subsections describe the function of DQ1, DQ2, DQ3, DQ5, DQ6, and DQ7.  
7.8.1  
DQ7: Data# Polling  
The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Program or Erase algorithm  
is in progress or completed, or whether the device is in Erase Suspend. Data# Polling is valid after the rising  
edge of the final WE# pulse in the command sequence. Note that the Data# Polling is valid only for the last  
word being programmed in the write-buffer-page during Write Buffer Programming. Reading Data# Polling  
status on any word other than the last word to be programmed in the write-buffer-page returns false status  
information.  
During the Embedded Program algorithm, the device outputs on DQ7 the complement of the datum  
programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the  
Embedded Program algorithm is complete, the device outputs the datum programmed to DQ7. The system  
must provide the program address to read valid status information on DQ7. If a program address falls within a  
protected sector, Data# polling on DQ7 is active, then that sector returns to the read mode.  
During the Embedded Erase Algorithm, Data# polling produces a “0” on DQ7. When the Embedded Erase  
algorithm is complete, or if the device enters the Erase Suspend mode, Data# Polling produces a “1” on DQ7.  
The system must provide an address within any of the sectors selected for erasure to read valid status  
information on DQ7.  
After an erase command sequence is written, if all sectors selected for erasing are protected, Data# Polling  
on DQ7 is active for approximately 100 µs, then the device returns to the read mode. If not all selected  
sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the  
selected sectors that are protected. However, if the system reads DQ7 at an address within a protected  
sector, the status may not be valid.  
Just prior to the completion of an Embedded Program or Erase operation, DQ7 may change asynchronously  
with DQ6-DQ0 while Output Enable (OE#) is asserted low. That is, the device may change from providing  
status information to valid data on DQ7. Depending on when the system samples the DQ7 output, it may read  
36  
S29GL-P MirrorBit® Flash Family  
S29GL-P_00_A7 November 8, 2007  
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