P r e l i m i n a r y
Revision Summary
Revision A (January 29, 2004)
Initial Release.
Revision A+1 (February 23, 2004)
Connection Diagrams
Removed 80-ball Fine-pitch BGA pinout.
Ordering Information
Added additional packing type.
Removed frame description from package material set.
Updated valid combinations to reflect the addition of new package type.
Added marking descriptions to all valid combination tables.
Word Program Command Sequence and Unlock Bypass Command
Sequence
Added these sections.
Figure 3, “Write Buffer Programming Operation“, Figure 4, “Program
Operation“
Updated figure.
Table 31, “Command Definitions (x16 Mode, BYTE# = V ),”
IH
Updated table.
Added note 19.
Table 32, “Command Definitions (x8 Mode, BYTE# = V ),”
IL
Updated table.
Added note 17.
Figure 7, “Data# Polling Algorithm“
Updated figure.
Erase and Program Operations and Alternate CE# Controlled Erase and
Program Operations
Updated T
description
WHWHI
Added Note 4.
Figure 16, “Program Operation Timings“, Figure 18, “Chip/Sector Erase
Operation Timings“, Figure 20, “Toggle Bit Timings (During Embedded
Algorithms)“, Figure 24, “Alternate CE# Controlled Write (Erase/
Program) Operation Timings“
Updated figure.
Physical Dimensions
Removed BGA-63P-M02 and BGA-80P-M01
Added the TS040 package
Revision A+2 (February 25, 2004)
Connection Diagrams
Removed the 40-pin reverse TSOP diagram.
158
S29GLxxxM MirrorBitTM Flash Family
S29GLxxxM_00A5 April 30, 2004
SPANSION [ SPANSION ]
