A d v a n c e I n f o r m a t i o n
Command Definitions
Table 30. Command Definitions (x16 Mode, BYTE# = VIH
)
Bus Cycles (Notes 2–5)
Command
Sequence
(Note 1)
First
RA
Second
Third
Fourth
Fifth
Sixth
Read (Note 5)
Reset (Note 6)
1
1
4
6
4
4
RD
F0
XXX
555
555
555
555
Manufacturer ID
AA
AA
AA
AA
2AA
2AA
2AA
2AA
55
555
90
90
90
90
X00
X01
X01
X03
0001
Device ID (Note 8)
55
55
55
555
555
555
227E
X0E (Note 19) X0F (Note 19)
Device ID (Note 9)
(Note 18)
(Note 10)
Secured SiliconSector Factory Protect
Sector Group Protect Verify
(Note 11)
4
555
AA
2AA
55
555
90 (SA)X02
88
00/01
Enter Secured Silicon Sector Region
Exit Secured Silicon Sector Region
Program
3
4
4
3
1
3
3
2
2
6
6
1
1
1
555
555
555
555
SA
AA
AA
AA
AA
29
AA
AA
A0
90
AA
AA
B0
30
98
2AA
2AA
2AA
2AA
55
55
55
55
555
555
555
SA
90
A0
25
XXX
PA
00
PD
Write to Buffer (Note 12)
Program Buffer to Flash
Write to Buffer Abort Reset (Note 13)
Unlock Bypass
SA
WC
PA
PD
WBL
PD
555
555
XXX
XXX
555
555
XXX
XXX
55
2AA
2AA
PA
55
55
PD
00
55
55
555
555
F0
20
Unlock Bypass Program (Note 14)
Unlock Bypass Reset (Note 15)
Chip Erase
XXX
2AA
2AA
555
555
80
80
555
555
AA
AA
2AA
2AA
55
55
555
SA
10
30
Sector Erase
Program/Erase Suspend (Note 16)
Program/Erase Resume (Note 17)
CFI Query (Note 18)
Legend:
X = Don’t care
PD = Program Data for location PA. Data latches on rising edge of
WE# or CE# pulse, whichever happens first.
SA = Sector Address of sector to be verified (in autoselect mode) or
erased. Address bits A21–A15 uniquely select any sector.
WBL = Write Buffer Location. Address must be within same write
buffer page as PA.
RA = Read Address of memory location to be read.
RD = Read Data read from location RA during read operation.
PA = Program Address. Addresses latch on falling edge of WE# or
CE# pulse, whichever happens later.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes:
1. See Table 4 on page 18 for description of bus operations.
2. All values are in hexadecimal.
3. Shaded cells indicate read cycles. All others are write cycles.
4. During unlock and command cycles, when lower address bits are 555 or 2AA as shown in table, address bits above A11 and data bits
above DQ7 are don’t care.
5. No unlock or command cycles required when device is in read mode.
6. Reset command is required to return to read mode (or to erase-suspend-read mode if previously in Erase Suspend) when device is in
autoselect mode, or if DQ5 goes high while device is providing status information.
7. Fourth cycle of the autoselect command sequence is a read cycle. Data bits DQ15–DQ8 are don’t care. Except for RD, PD and WC.
SeeAutoselect Command Sequence on page 44 for more information.
8. For S29GL064A and S29GL032A, Device ID must be read in three cycles.
9. For S29GL016A, Device ID must be read in one cycle.
10. Refer to Table 15 on page 31 for data indicating Secured Silicon Sector factory protect status.
11. Data is 00h for an unprotected sector group and 01h for a protected sector group.
12. Total number of cycles in command sequence is determined by number of words written to write buffer. Maximum number of cycles in
command sequence is 21, including Program Buffer to Flash command.
13. Command sequence resets device for next command after aborted write-to-buffer operation.
14. Unlock Bypass command is required prior to Unlock Bypass Program command.
15. Unlock Bypass Reset command is required to return to read mode when device is in unlock bypass mode.
16. System may read and program in non-erasing sectors, or enter autoselect mode, when in Erase Suspend mode. Erase Suspend command
is valid only during a sector erase operation.
17. Erase Resume command is valid only during Erase Suspend mode.
18. Command is valid when device is ready to read array data or when device is in autoselect mode.
19. Refer to Table 15 on page 31, for individual Device IDs per device density and model number.
54
S29GL-A MirrorBit™ Flash Family
S29GL-A_00_A3 April 22, 2005
SPANSION [ SPANSION ]
