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MBM29DL324TE90TN 参数 Datasheet PDF下载

MBM29DL324TE90TN图片预览
型号: MBM29DL324TE90TN
PDF下载: 下载PDF文件 查看货源
内容描述: FLASH存储器CMOS 32米(4 MX 8/2 MX 16 )位双操作 [FLASH MEMORY CMOS 32 M (4 M X 8/2 M X 16) BIT Dual Operation]
分类和应用: 存储
文件页数/大小: 84 页 / 1272 K
品牌: SPANSION [ SPANSION ]
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MBM29DL32XTE/BE80/90  
• Data Protection  
The MBM29DL32XTE/BE are designed to offer protection against accidental erasure or programming caused  
by spurious system level signals that may exist during power transitions. During power up the devices automat-  
ically reset the internal state machine in the Read mode. Also, with its control register architecture, alteration of  
the memory contents only occurs after successful completion of specific multi-bus cycle command sequences.  
The devices also incorporate several features to prevent inadvertent write cycles resulting form VCC power-up  
and power-down transitions or system noise.  
• Low VCC Write Inhibit  
To avoid initiation of a write cycle during VCC power-up and power-down, a write cycle is locked out for VCC less  
than VLKO (Min) . If VCC < VLKO, the command register is disabled and all internal program/erase circuits are  
disabled. Under this condition the device will reset to the read mode. Subsequent writes will be ignored until the  
VCC level is greater than VLKO. It is the users responsibility to ensure that the control pins are logically correct to  
prevent unintentional writes when VCC is above VLKO (Min) .  
If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector (s) cannot be used.  
• Write Pulse “Glitch” Protection  
Noise pulses of less than 3 ns (typical) on OE, CE, or WE will not initiate a write cycle.  
• Logical Inhibit  
Writing is inhibited by holding any one of OE = VIL, CE = VIH, or WE = VIH. To initiate a write cycle CE and WE  
must be a logical zero while OE is a logical one.  
• Power-Up Write Inhibit  
Power-up of the devices with WE = CE = VIL and OE = VIH will not accept commands on the rising edge of WE.  
The internal state machine is automatically reset to the read mode on power-up.  
• Sector Group Protection  
Device user is able to protect each sector group individually to store and protect data. Protection circuit voids  
both write and erase commands that are addressed to protected sectors.  
Any commands to write or erase addressed to protected sector are ignored (see “FUNCTIONAL DESCRIP-  
TION Sector Group Protection”)  
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