MBM29DL16XTE/BE70/90
• Low VCC Write Inhibit
To avoid initiation of a write cycle during VCC power-up and power-down, a write cycle is locked out for VCC less
thanVLKO (Min).IfVCC <VLKO,thecommandregisterisdisabledandallinternalprogram/erasecircuitsaredisabled.
Under this condition the device will reset to the read mode. Subsequent writes will be ignored until the VCC level
is greater than VLKO. It is the users responsibility to ensure that the control pins are logically correct to prevent
unintentional writes when VCC is above VLKO (Min).
If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector(s) cannot be used.
• Write Pulse “Glitch” Protection
Noise pulses of less than 3 ns (typical) on OE, CE, or WE will not initiate a write cycle.
• Logical Inhibit
Writing is inhibited by holding any one of OE = VIL, CE = VIH, or WE = VIH. To initiate a write cycle CE and WE
must be a logic “0” while OE is a logic “1”.
• Power-Up Write Inhibit
Power-up of the devices with WE = CE = VIL and OE = VIH will not accept commands on the rising edge of WE.
The internal state machine is automatically reset to the read mode on power-up.
• Sector Group Protection
Device user is able to protect each sector group individually to store and protect data. Protection circuit voids
both program and erase commands that are addressed to protected sectors.
Any command to program or erase addressed to protected sector are ignored (see “Sector Group Protection”
in ■ FUNCTIONAL DESCRIPTION).
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SPANSION [ SPANSION ]
