GENERAL DESCRIPTION
The Am29DL320G is a 32 megabit, 3.0 volt-only flash
memory device, organized as 2,097,152 words of 16
bits each or 4,194,304 bytes of 8 bits each. Word
mode data appears on DQ15–DQ0; byte mode data
appears on DQ7–DQ0. The device is designed to be
programmed in-system with the standard 3.0 volt V
CC
supply, and can also be programmed in standard
EPROM programmers.
The device is available with an access time of 70, 90,
or 120 ns. The devices are offered in 48-pin TSOP,
48-ball or 63-ball FBGA packages, and 64-ball Forti-
fied BGA. Standard control pins—chip enable (CE#),
write enable (WE#), and output enable (OE#)—control
normal read and write operations, and avoid bus con-
tention issues.
The device requires only a
single 3.0 volt power sup-
ply
for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
32 Mbit Am29DL32x devices had a larger SecSi
Sector.
Factory locked parts provide several options.
The SecSi Sector may store a secure, random 16 byte
ESN (Electronic Serial Number), customer code (pro-
grammed through AMD’s ExpressFlash service), or
both.
DMS (Data Management Software)
allows systems
to remove EEPROM devices. by simplifying system
software: DMS performs all functions necessary to
modify data in file structures, instead of using sin-
gle-byte modifications. To write or update a particular
piece of data (a phone number or configuration data,
for example), the user only needs to state which piece
of data is to be updated, and where the updated data
is located in the system. This is an advantage com-
pared to systems where user-written software must
keep track of the old data location, status, logical to
physical translation of the data onto the Flash memory
device (or memory devices), and more. Using DMS,
user-written software does not need to interface with
the Flash memory directly. Instead, the user's software
accesses the Flash memory by calling one of only six
functions. AMD provides this software to simplify sys-
tem design and software integration efforts.
The device offers complete compatibility with the
JEDEC single-power-supply Flash command set
standard.
Commands are written to the command
register using standard microprocessor write timings.
Reading data out of the device is similar to reading
from other Flash or EPROM devices.
The host system can detect whether a program or
erase operation is complete by using the device
sta-
tus bits:
RY/BY# pin, DQ7 (Data# Polling) and
DQ6/DQ2 (toggle bits). After a program or erase cycle
has been completed, the device automatically returns
to the read mode.
The
sector erase architecture
allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The
hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved in-system or via program-
ming equipment.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the
automatic sleep mode.
The system can also place the device into the
standby mode.
Power consumption is greatly re-
duced in both modes.
Simultaneous Read/Write Operations with
Zero Latency
The Simultaneous Read/Write architecture provides
simultaneous operation
by dividing the memory
space into
four banks,
two 4 Mb banks with small and
large sectors, and two 12 Mb banks of large sectors.
Sector addresses are fixed, system software can be
used to form user-defined bank groups.
During an Erase/Program operation, any of the three
non-busy banks may be read from. Note that only two
banks can operate simultaneously. The device allows
a host system to program or erase in one bank, then
immediately and simultaneously read from the other
bank, with zero latency. This releases the system from
waiting for the completion of program or erase
operations.
The Am29DL320G can be organized as either a top or
bottom boot sector configuration.
Bank
Bank 1
Bank 2
Bank 3
Bank 4
Megabits
4 Mb
12 Mb
12 Mb
4 Mb
Sector Sizes
Eight 8 Kbyte/4 Kword,
Seven 64 Kbyte/32 Kword
Twenty-four 64 Kbyte/32 Kword
Twenty-four 64 Kbyte/32 Kword
Eight 64 Kbyte/32 Kword
Am29DL320G Features
The
SecSi
TM
(Secured Silicon) Sector
is an 256 byte
extra sector capable of being permanently locked by
AMD or customers. The
SecSi Indicator Bit
(DQ7) is
permanently set to a 1 if the part is
factory locked,
and set to a 0 if
customer lockable.
This way, cus-
tomer lockable parts can never be used to replace a
factory locked part.
Note that some previous AMD
2
Am29DL320G
September 27, 2004
SPANSION [ SPANSION ]
